Miswire protection and annunciation of system conditions for arc fault circuit interrupters and other wiring devices
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H02H-003/00
H02H-009/08
H02H-001/00
H02H-011/00
G01R-031/04
G01R-031/02
출원번호
US-0528809
(2012-06-20)
등록번호
US-8995098
(2015-03-31)
발명자
/ 주소
Tomimbang, Wendell E.
출원인 / 주소
True-Safe Technologies, Inc.
대리인 / 주소
The Miller Law Offices PLC
인용정보
피인용 횟수 :
2인용 특허 :
8
초록▼
Electrical distribution systems, equipment and wiring devices are required to have their wiring connections properly identified to ensure proper operation of connected loads as well as the safety of users, however, errors in installation do occur. Electrical wiring errors are commonly called miswire
Electrical distribution systems, equipment and wiring devices are required to have their wiring connections properly identified to ensure proper operation of connected loads as well as the safety of users, however, errors in installation do occur. Electrical wiring errors are commonly called miswire conditions. The current invention is an integrated system and method of miswire protection and annunciation of system conditions for Arc Fault Circuit Interrupters (AFCIs) and other wiring devices, electrical systems and equipment. Electrical code and regulatory standards require certain wiring devices to include miswire protection with their standard features. These wiring devices, among others include Arc Fault Circuit Interrupters (AFCIs) and Ground Fault Circuit Interrupters (GFCIs) which are required to incorporate protection from miswire conditions with other electrical faults they are designed to protect circuits from, such as and including arc, ground, overload, short circuit, and surge.
대표청구항▼
1. A microprocessor-based system for miswire protection integrated with known circuit protection systems and devices, said microprocessor-based system improving the scope of said known protection systems and devices protection, said microprocessor-based miswire protection system comprising: having a
1. A microprocessor-based system for miswire protection integrated with known circuit protection systems and devices, said microprocessor-based system improving the scope of said known protection systems and devices protection, said microprocessor-based miswire protection system comprising: having a microprocessor-based circuit protection system, having a switched-mode-power-supply Direct current (DC) power supply to said system, connecting to the Line-side and Load-side terminal connections in said system, processing data inputs and outputs through the system's microprocessor, said microprocessor monitoring and controlling the system's entire circuit, said system detecting a miswire fault, having a voltage divider circuit in said system, having a tripping circuit in said system, having a trip mechanism in said system, having a contactor in said system, having a means for resetting a tripped circuit in said system, having a means for indicating a trip/reset in said system, having a means to reset the tripped mechanism in said system, having a means to annunciate faults and other conditions in said system, having a means for interconnecting said integrated system elements, wherein said microprocessor-based circuit protection system is code-driven, said code is algorithm-based and said algorithm having a miswire protection system integrated therein, said algorithm-based code having all the possible miswire conditions programmed therein, said programmed miswire conditions being Line-Load reversal, Line-side-Line and Neutral reversal, Line and Load side cross-wiring. 2. The system of claim 1 further being integrated with protection systems and devices for electrical faults including arcs, overload, short circuit, and ground. 3. The system of claim 2 wherein the circuit elements for miswire detection are integrated with said arc, overload, short circuit, and ground protection systems, and said arc, overload, short circuit, surge and ground protection systems utilize their own microprocessor and sensor fault detection elements and circuits to identify and annunciate said arc, overload, short circuit, and ground faults. 4. The system of claim 2 wherein said miswire fault protection system microprocessor is the microprocessor for said integrated arc, overload, short circuit, and ground protection systems, including receiving input signals from the monitoring circuit, processing them according to algorithm-based code, executing commands to trip the circuit, annunciating the occurrence of faults and identifying them for diagnostic purposes. 5. The system of claim 1, wherein said DC power supply includes a voltage regulator and a set of two bridge rectifiers connected in parallel across the Line and Load sides of said miswire fault protection system, said bridge rectifiers feeding a switch-mode-power-supply circuit thereby providing a continuous supply of power to the DC power driven components of said protection system. 6. The system of claim 1 wherein the voltage divider circuit is connected across the Line-Side-Line and Line-Side-Neutral connections of the protection system and device to ensure that there is always AC Line synchronization for the protection system and device monitoring and control systems, regardless if the Line and Neutral connections are miswired. 7. The system of claim 1 wherein the Line-Neutral indicator circuit is connected between Line or Neutral and Ground to provide a signal to the microprocessor to determine a line-neutral miswire condition according to said microprocessor's code, wherein said Trip/Reset indicator circuit provides a signal to the microprocessor to determine the trip and reset mechanism's trip status, and wherein the Line-Neutral indicator signal together with the Trip/Reset indicator signal are used by said microprocessor to determine the occurrence of a miswire fault condition, and then trip the circuit and activate said fault annunciation elements. 8. The system of claim 1, wherein the means to annunciate faults includes having an audible alarm and visual display of system conditions and faults, where said alarm and visual display identifies the specific faults that occurred. 9. The annunciation element of the system of claim 8 which includes monitoring and metering of system conditions such as voltage, current, wattage or energy consumption, and where said annunciation system element is integrated within the protection system and device itself or remotely through a wireless interface, said wireless interface transmitting system conditions and faults, and receiving commands to trip or reset the device. 10. A method for having a microprocessor-based system for miswire protection integrated with known circuit protection systems and devices, said microprocessor-based system improving the scope of said known protection systems and devices protection, said microprocessor-based miswire protection system comprising: the step of having a microprocessor-based circuit protection system, the step of providing a switched-mode-power-supply Direct current (DC) power supply to said system, the step of connecting to the Line-side and Load-side terminal connections in said system, the step of processing data inputs and outputs through the system's microprocessor, the step of said microprocessor monitoring and controlling the system's entire circuit, the step of said system detecting a miswire fault, the step of having a voltage divider circuit in said system, the step of having a tripping circuit in said system, the step of having a trip mechanism in said system, the step of having a contactor in said system, the step of having a means for resetting a tripped circuit in said system, the step of having a means for indicating a trip/reset in said system, the step of having a means to reset the tripped mechanism in said system, the step of having a means to annunciate faults and other conditions in said system, the step of having a means for interconnecting said integrated system elements, the step of said microprocessor-based circuit protection system being code-driven, said code is algorithm-based and said algorithm having a miswire protection system integrated therein, said algorithm-based code having all the possible miswire conditions programmed therein, said programmed miswire conditions being Line-Load reversal, Line-side-Line and Neutral reversal, Line and Load side cross-wiring. 11. The method of claim 10 further being integrated with protection systems and devices for electrical faults including arcs, overload, short circuit, and ground. 12. The method of claim 11, wherein the circuit elements for miswire detection are integrated with said arc, overload, short circuit, and ground protection systems, and said arc, overload, short circuit, surge and ground protection systems utilize their own microprocessor and sensor fault detection elements and circuits to identify and annunciate said arc, overload, short circuit, surge and ground faults. 13. The method of claim 11 wherein said miswire fault protection system microprocessor is the microprocessor for said integrated arc, overload, short circuit, and ground protection systems, including receiving input signals from the monitoring circuit, processing them according to algorithm-based code, executing commands to trip the circuit, annunciating the occurrence of faults and identifying them for diagnostic purposes. 14. The method of claim 10, wherein said DC power supply includes a voltage regulator and a set of two bridge rectifiers connected in parallel across the Line and Load sides of said miswire fault protection system, said bridge rectifiers feeding a switch-mode-power-supply circuit thereby providing a continuous supply of power to the DC power driven components of said protection system. 15. The method of claim 10 wherein the voltage divider circuit is connected across the Line-Side-Line and Line-Side-Neutral connections of the protection system and device to ensure that there is always AC Line synchronization for the protection system and device monitoring and control systems, regardless if the Line and Neutral connections are miswired. 16. The method of claim 10 wherein the Line-Neutral indicator circuit is connected between Line or Neutral and Ground to provide a signal to the microprocessor to determine a line-neutral miswire condition according to said microprocessor's code, wherein said Trip/Reset indicator circuit provides a signal to the microprocessor to determine the trip and reset mechanism's trip status, and wherein the Line-Neutral indicator signal together with the Trip/Reset indicator signal are used by said microprocessor to determine the occurrence of a miswire fault condition, and then trip the circuit and activate said fault annunciation elements. 17. The method of claim 10, wherein the means to annunciate faults includes having an audible alarm and visual display of system conditions and faults, wherein said alarm and visual display identifies the specific faults that occurred. 18. The annunciation element of the method of claim 17 which includes monitoring and metering of system conditions such as voltage, current, wattage or energy consumption, and where said annunciation system element is integrated within the protection system and device itself or remotely through a wireless interface, said wireless interface transmitting system conditions and faults, and receiving commands to trip or reset the device.
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이 특허에 인용된 특허 (8)
Macbeth, Bruce F.; Packard, Thomas N., Arc fault circuit detector device detecting pulse width modulation of arc noise.
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