[미국특허]
Electronic interconnect devices having conductive vias
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01R-013/648
H01R-013/658
H01R-012/71
H01R-013/24
H01R-024/38
출원번호
US-0769584
(2013-02-18)
등록번호
US-9039448
(2015-05-26)
발명자
/ 주소
Mason, Jeffery Walter
Alden, III, Wayne Stewart
출원인 / 주소
Tyco Electronics Corporation
인용정보
피인용 횟수 :
4인용 특허 :
18
초록▼
An electronic interconnect device includes a substrate having a first surface and a second surface. The substrate has a plurality of openings extending between the first and second surfaces. Each opening has a conductive outer via, an insulative barrier and a conductive inner via. The outer via, ins
An electronic interconnect device includes a substrate having a first surface and a second surface. The substrate has a plurality of openings extending between the first and second surfaces. Each opening has a conductive outer via, an insulative barrier and a conductive inner via. The outer via, insulative barrier and inner via are concentric within the opening such that the insulating barrier is disposed between the conductive inner via and the conductive outer via. The conductive inner via is configured to receive a conductor to be inserted therein.
대표청구항▼
1. An electronic interconnect device comprising: a substrate having a first surface and a second surface, the substrate having a plurality of openings extending between the first and second surfaces, each opening having a conductive outer via, an insulative barrier deposited on the conductive outer
1. An electronic interconnect device comprising: a substrate having a first surface and a second surface, the substrate having a plurality of openings extending between the first and second surfaces, each opening having a conductive outer via, an insulative barrier deposited on the conductive outer via, and a conductive inner via deposited on the insulative barrier, wherein the conductive outer via, insulative barrier and conductive inner via are concentric within the opening such that the insulating barrier is disposed between the conductive inner via and the conductive outer via; andwherein the conductive inner via defines an open space of the opening configured to receive a conductor to be inserted therein. 2. The electronic interconnect device of claim 1, wherein a plurality of the conductive outer vias are electrically commoned and grounded. 3. The electronic interconnect device of claim 1, further comprising a ground shield on the substrate, the outer vias being electrically common with the ground shield. 4. The electronic interconnect device of claim 1, wherein the substrate is plated with a ground plating on the first surface and in the plurality of openings, the ground plating defining a ground shield on the first surface and defining the conductive outer vias in the openings, each of the outer vias being electrically commoned by the ground shield. 5. The electronic interconnect device of claim 1, wherein the insulative barriers are coated on the corresponding conductive outer vias and the conductive inner vias are plated on the corresponding insulative barriers. 6. The electronic interconnect device of claim 1, further comprising conductors received in the openings and being electrically connected to the conductive inner vias, the conductors transmitting data signals to the conductive inner vias. 7. The electronic interconnect device of claim 1, wherein the conductive outer vias are electrically connected to a ground layer on the first surface, the insulative barriers being integral with an insulative layer deposited on the ground layer. 8. The electronic interconnect device of claim 1, wherein the insulative barriers are integral with an insulative layer deposited on the second surface, the conductive inner vias being electrically connected to solder pads deposited on the insulative layer, solder balls being applied to corresponding signal pads. 9. The electronic interconnect device of claim 1, wherein the substrate further comprises at least one grounding opening therethrough consisting of a conductive ground via electrically connected to the conductive outer vias, each ground opening being devoid of any insulative barrier and any conductive inner via. 10. An electronic interconnect device comprising: a substrate having a first surface and a second surface, the substrate having a plurality of openings extending between the first and second surfaces, each opening having a conductive outer via, an insulative barrier deposited on the conductive outer via, and a conductive inner via deposited on the insulative barrier, wherein the conductive outer via, insulative barrier and conductive inner via are concentric within the opening such that the insulative barrier is disposed between the conductive inner via and the conductive outer via, wherein the conductive inner via defines an open space configured to receive a conductor to be inserted therein; anda plurality of conductors received in corresponding conductive inner vias, the conductors being electrically connected to the conductive inner via, the conductors having a first end extending out of the openings and being configured to be electrically connected to a first electronic component. 11. The electronic interconnect device of claim 10, wherein the plurality of conductors are compressive in a longitudinal direction along corresponding opening axes. 12. The electronic interconnect device of claim 10, wherein the plurality of conductors are deflectable in a vertical direction into the openings, the plurality of conductors being deflectable in a horizontal direction to press outward against the inner vias. 13. The electronic interconnect device of claim 10, wherein the plurality of conductors are compressible to shorten and widen the conductors within the openings, the conductors being biased against the conductive inner vias. 14. The electronic interconnect device of claim 10, wherein each conductor comprises a spring and an arrowhead spring extending from the spring and defining the first end, the arrowhead spring having a tip configured to engage the first electronic component, the arrowhead spring being narrower proximate the tip and wider toward the spring. 15. The electronic interconnect device of claim 14, wherein the spring compresses vertically to shorten the conductor, the arrowhead spring deflects outward to widen the conductor and press outward against the conductive inner via. 16. The electronic interconnect device of claim 10 further comprising a cover on the first surface, the cover capturing the conductors in the openings, the conductors being spring biased against toward the cover. 17. The electronic interconnect device of claim 10, wherein the conductors comprise elastomeric columns being internally conductive, the elastomeric column being compressible and pressed outward against the conductive inner vias to define electrical paths between the elastomeric columns and the conductive inner vias. 18. The electronic interconnect device of claim 10, wherein the conductors each have a second end extending out of the openings beyond the second surface, the second ends being configured to be electrically connected to a second electronic component, wherein electrical paths are defined between the first and second electronic components through the conductors and the conductive inner vias. 19. The electronic interconnect device of claim 10, wherein the insulative barriers are integral with an insulative layer deposited on the second surface, the conductive inner vias being electrically connected to signal pads deposited on the insulative layer, solder balls being applied to corresponding signal pads, wherein electrical paths are defined from the first end of the conductor to the conductive inner vias and from the conductive inner vias to the signal pads and solder balls. 20. An electronic interconnect system comprising: a substrate having a first surface and a second surface, the substrate having a plurality of openings extending between the first and second surfaces, each opening having a conductive outer via, an insulative barrier deposited on the conductive outer via, and a conductive inner via deposited on the insulative barrier, wherein the conductive outer via, insulative barrier and conductive inner via are concentric within the opening such that the insulative barrier is disposed between the conductive inner via and the conductive outer via, wherein the conductive inner via defines an open space configured to receive a conductor to be inserted therein and electrically connected to the conductive inner via; andan electrical connector having a plurality of conductive compliant pins extending therefrom, the compliant pins comprising the conductors that provide electrical connections with the conductive inner vias, when the electrical connector is mated to the substrate at the first surface such that the compliant pins extend into corresponding openings to engage corresponding conductive inner vias.
Lightbody James D. (32600 Fairmount Blvd. Pepper Pike OH 44124) Lightbody William S. (32600 Fairmount Blvd. Pepper Pike OH 44124), Apparatus and method for testing circuit boards.
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