초록 ▼

A method includes forming isolation regions in a semiconductor substrate to define a first field effect transistor (FET) region, a second FET region, and a diode region, forming a first gate stack in the first FET region and a second gate stack in the second FET region, forming a layer of spacer mat

A method includes forming isolation regions in a semiconductor substrate to define a first field effect transistor (FET) region, a second FET region, and a diode region, forming a first gate stack in the first FET region and a second gate stack in the second FET region, forming a layer of spacer material over the second FET region and the second gate stack, forming a first source region and a first drain region in the first FET region and a first diode layer in the diode region using a first epitaxial growth process, forming a hardmask layer over the first source region, the first drain region, the first gate stack and a portion of the first diode layer, and forming a second source region and a second drain region in the first FET region and a second diode layer on the first diode layer using a second epitaxial growth process.

대표청구항 ▼

1. A semiconductor device, comprising: isolation regions formed in a semiconductor substrate to define a first field effect transistor (FET) region, a second FET region, and a diode region;a first gate stack formed in the first FET region and a second gate stack formed in the second FET region;a fir

1. A semiconductor device, comprising: isolation regions formed in a semiconductor substrate to define a first field effect transistor (FET) region, a second FET region, and a diode region;a first gate stack formed in the first FET region and a second gate stack formed in the second FET region;a first epitaxial source region and a first epitaxial drain region formed in the first FET region and a first epitaxial diode layer formed in the diode region; anda second epitaxial source region and a second epitaxial drain region formed in the second FET region and a second epitaxial diode layer formed on the first epitaxial diode layer. 2. The semiconductor device of claim 1, wherein the first epitaxial source region, the first epitaxial drain region, and portions of the first epitaxial diode layer include p-type dopants, and the second epitaxial source region, the second epitaxial drain region, and the second epitaxial diode layer include n-type dopants. 3. The semiconductor device of claim 1, wherein the first epitaxial source region, the first epitaxial drain region, and portions of the first epitaxial diode layer include n-type dopants, and the second epitaxial source region, the second epitaxial drain region, and the second epitaxial diode layer include p-type dopants. 4. The semiconductor device of claim 1, wherein the first epitaxial diode layer has a greater thickness than the first epitaxial source region. 5. The semiconductor device of claim 1, wherein the second epitaxial source region and the second epitaxial drain region comprise a silicon germanium material. 6. The semiconductor device of claim 1, further comprising a doped region formed in the first epitaxial diode layer and an undoped region disposed on the doped region of the first epitaxial diode layer. 7. The semiconductor device of claim 1, wherein the first epitaxial diode layer is formed from a same semiconductor material as the first epitaxial source and drain regions, and the second epitaxial diode layer is formed from a same semiconductor material as the second epitaxial source and drain regions.