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A data flow controller for reconfigurable computers. The novel data flow controller includes a first circuit for selecting one of a plurality of operating conditions and a second circuit for determining if the selected condition is met and outputting a control signal accordingly. In an illustrative

A data flow controller for reconfigurable computers. The novel data flow controller includes a first circuit for selecting one of a plurality of operating conditions and a second circuit for determining if the selected condition is met and outputting a control signal accordingly. In an illustrative embodiment, the operating conditions include: when all enabled data available signals are asserted and all enabled space available signals are asserted; when any enabled data available signal is asserted and all enabled space available signals are asserted; when all enabled data available signals are asserted and any enabled space available signal is asserted; and when any enabled data available signal is asserted and any enabled space available signal is asserted. By allowing a configurable element to operate under different possible conditions, data flow signals can also then be used to control what operation the element performs, in addition to controlling when.

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1. A configurable element for a reconfigurable computer configured in a distributed control, data flow architecture, the configurable element comprising: an operational element configured to perform a plurality of different logical operations on data;a finite state machine adapted to configure the o

1. A configurable element for a reconfigurable computer configured in a distributed control, data flow architecture, the configurable element comprising: an operational element configured to perform a plurality of different logical operations on data;a finite state machine adapted to configure the operational element to perform a selected logical operation of the plurality of different logical operations and output a plurality of first control signals, in accordance with an input/output condition;a data flow controller comprising: first means for selecting one of a plurality of input/output conditions in accordance with the plurality of first control signals from the finite state machine, the input/output conditions indicating availability of input data to the operational element and availability of spaces for receiving output data from the operational element;second means for determining if the selected input/output condition is satisfied and for outputting a second control signal to the finite state machine for controlling the operational element to perform said selected logical operation on the data, when the selected input/output condition is satisfied;a first circuit for determining if all selected input signals are asserted;a second circuit for determining if any selected input signal is asserted;a first switch for receiving one or more of the first control signals and selecting the first circuit or the second circuit based on said received first control signals;a third circuit for determining if all selected output conditions are asserted;a fourth circuit for determining if any selected output condition is asserted;a second switch for receiving one or more of the first control signals and selecting the third circuit or the fourth circuit based on said received first control signals;wherein the data flow controller causes the finite state machine to control the operational element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted,a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted; anda programmable interconnection network for routing control signals to the finite state machine and the data flow controller, wherein the configurable element does not have a program counter. 2. The invention of claim 1 wherein one of said operating conditions includes when all enabled data available signals are asserted and all enabled space available signals are asserted. 3. The invention of claim 1 wherein one of said operating conditions includes when any enabled data available signal is asserted and all enabled space available signals are asserted. 4. The invention of claim 1 wherein one of said operating conditions includes when all enabled data available signals are asserted and any enabled space available signal is asserted. 5. The invention of claim 1 wherein one of said operating conditions includes when any enabled data available signal is asserted and any enabled space available signal is asserted. 6. The invention of claim 1 wherein said first means includes means for selecting one of a plurality of conditions for data available signals. 7. The invention of claim 6 wherein one of said conditions for data available signals includes when all enabled data available signals are asserted. 8. The invention of claim 6 wherein one of said conditions for data available signals includes when any enabled data available signal is asserted. 9. The invention of claim 1 wherein said first means includes means for selecting one of a plurality of conditions for space available signals. 10. The invention of claim 9 wherein one of said conditions for space available signals includes when all enabled space available signals are asserted. 11. The invention of claim 9 wherein one of said conditions for space available signals includes when any enabled space available signal is asserted. 12. A configurable element for a reconfigurable computer configured in a distributed control, data flow architecture, the configurable element comprising: an operational element configurable to perform a plurality of different logical operations on data;a finite state machine adapted to configure the operational element to perform a selected logical operation of the plurality of different logical operations and output a first control signal and a second control signal; anda data flow controller comprising: a first circuit for receiving and determining if all selected signals of the data flow signals are asserted;a second circuit for receiving and determining if any selected signal of the data flow signals is asserted;a first switching circuit adapted to receive the first control signal from the finite state machine and in accordance therewith select the output of said first circuit or the output of said second circuit;a third circuit for receiving and determining if all selected output conditions of the data flow signals are asserted;a fourth circuit for receiving and determining if any selected output conditions of the data flow signals is asserted;a second switching circuit adapted to receive the second control signal from the finite state machine and in accordance therewith select an output of said third circuit or an output of said fourth circuit;a fifth circuit adapted to receive the output of said first switching circuit and the output of said second switching circuit and in accordance therewith output a third control signal to the finite state machine for configuring the configurable element to perform the selected logical operation,wherein each of the enabled data available signals indicates availability of input data to the operational element and each of the enabled space available signals indicates availability of a space for receiving output data from the operational element, and wherein the data flow controller causes the finite state machine to configure the operational element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted,a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted; anda programmable interconnection network for routing control signals to the finite state machine and the data flow controller, wherein the configurable element does not have a program counter. 13. A configurable element for a reconfigurable computer configured in a distributed control, data flow architecture, the configurable element comprising: an operational element configurable to perform a plurality of different logical operations on data;a finite state machine adapted to configure the operational element to perform a selected logical operation of the plurality of different logical operations and output a first control signal and a second control signal; anda data flow controller comprising: a first circuit and a second circuit for selecting one of a plurality of operating conditions that determines the selected logical operation to be performed by the operational element,the first circuit for receiving and determining if all or any selected signal of the data flow signals is asserted in accordance with the first control signal received from the finite state machine,the second circuit for receiving and determining if all or any enabled space available signals of the data flow signals are asserted in accordance with the second control signal received from the finite state machine; anda third circuit adapted to receive outputs from said first and second circuits to determine if the selected operating condition is met and in accordance therewith output a third control signal to the finite state machine for controlling the operational element to perform the selected logical operation,wherein the first and second circuits are adapted to select the operating condition prior to the third circuit being utilized to determine if the selected operating condition is met, andwherein each of the enabled data available signal indicates availability of selected input data to the operational element and each of the enabled space available signals indicates availability of a space for receiving output data from the operational element, and wherein the data flow controller causes the finite state machine to configure the operational element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted, a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted; anda programmable interconnection network for routing control signals to the finite state machine and the data flow controller, wherein the configurable element does not have a program counter. 14. A reconfigurable computer configured in a distributed control, data flow architecture, comprising: configuration registers;a plurality of elements; anda programmable interconnection network adapted to connect said elements in accordance with configuration settings stored in said configuration registers,wherein each element includes an operational element configurable to perform a plurality of different logical operations on data,a finite state machine adapted to configure the operational element to perform a selected logical operation of the plurality of different logical operations and output a plurality of first control signals, anda data flow controller adapted to receive the data flow signals and select one of a plurality of operating conditions in accordance with the first control signals received from the finite state machine and the data flow signals, and if the selected operating condition is met, the data flow controller is adapted to output a second control signal to the finite state machine indicating said operational element should perform the selected logical operation in accordance with the selected operating condition,wherein the data flow controller is adapted to select the operating condition prior to generating the second control signal, andwherein the plurality of operating conditions indicate availability of input data to the operational element and availability of a space for receiving output data from the operational element, and wherein the data flow controller causes the finite state machine to configure the operational element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted, a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted; anda programmable interconnection network for routing control signals to the finite state machine and the data flow controller, wherein the configurable element does not have a program counter. 15. A reconfigurable computer configured in a distributed control, data flow architecture, comprising: configuration registers;a plurality of elements; anda programmable interconnection network adapted to connect said elements in accordance with configuration settings stored in said configuration registers,wherein each element includes an operational element configurable to perform a plurality of different logical operations on data,a finite state machine adapted to configure the operational element to perform a selected logical operation of the plurality of different logical operations and to output a plurality of first control signals, anda control circuit adapted to select one of a plurality of operating conditions in accordance with the plurality of first control signals received from the finite state machine and receive the data flow signals and in accordance therewith output a second control signal to the finite state machine for controlling said operational element to perform the selected logical operation in accordance with the selected operating condition,wherein the control circuit is adapted to select the operating condition prior to controlling said operational element to perform the operation, andwherein the data flow signals indicate availability of input data to the operational element and availability of spaces for receiving output data from the operational element, and wherein the the data flow controller causes the finite state machine to configure the operational element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted, a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted; anda programmable interconnection network for routing control signals to the finite state machine and the data flow controller, wherein the configurable element does not have a program counter. 16. The invention of claim 15 wherein said data flow signals include data available signals. 17. The invention of claim 15 wherein said data flow signals include space available signals. 18. The invention of claim 15 wherein the control circuit includes a data flow controller adapted to receive said data flow signals and in accordance therewith control when said operational element performs the operation. 19. The invention of claim 18 wherein one of said operating conditions includes when all enabled data available signals are asserted and all enabled space available signals are asserted. 20. The invention of claim 18 wherein one of said operating conditions includes when any enabled data available signal is asserted and all enabled space available signals are asserted. 21. The invention of claim 18 wherein one of said operating conditions includes when all enabled data available signals are asserted and any enabled space available signal is asserted. 22. The invention of claim 18 wherein one of said operating conditions includes when any enabled data available signal is asserted and any enabled space available signal is asserted. 23. A method for data flow control in a reconfigurable computer configured in a distributed control, data flow architecture, comprising a configurable element, a control circuit, and a finite state machine for controlling the configurable element, the method including the steps of: operating the finite state machine to configure the configurable element to perform a selected logical operation of a plurality of different logical operations on the data and output a plurality of first control signals;operating the control circuit to receive the data flow signals and selecting one of a plurality of operating conditions in accordance with the plurality of first control signals received from the finite state machine and the data flow signals, the operating conditions indicating availability of input data to the configurable element and availability of spaces for receiving output data from the configurable element; andoperating the control circuit to generate a second control signal indicating the selected logical operation should be performed if the selected operating condition is met, the second control signal being received by the finite state machine,wherein the data flow controller causes the finite state machine to configure the configurable element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted, a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted, wherein the configurable element does not have a program counter. 24. A method for controlling an element in a reconfigurable computer configured in a distributed control, data flow architecture, the element comprising a finite state machine and a control circuit, the method including the steps of: operating the finite state machine to receive data flow signals and configure said element to perform a selected logical operation of a plurality of different logical operations on the data and output a plurality of first control signals, if any enabled data available signals of the data flow signals are asserted and/or any enabled space available signals of the data flow signals are asserted, andoperating the control circuit to receive the data flow signals in accordance with the first control signals to output a second control signal to the finite state machine, the second control signal indicating when the selected logical operation is performed by the element using information on which of the data available signals and/or the space available signals are asserted,wherein each of the enabled data available signals indicates availability of input data to the element and each of the enabled space available signals indicates availability of a space for receiving output data from the element, andwherein the data flow controller causes the finite state machine to configure said element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted, a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted, wherein the configurable element does not have a program counter. 25. A method for providing dynamic switching in a reconfigurable computer configured in a distributed control, data flow architecture, the method including the steps of: providing a plurality of elements, wherein one or more of said elements is a dynamic switch element dedicated solely for dynamic switching and flow control; andconnecting said elements using a static programmable interconnection network,wherein the dynamic switch element comprises: a finite state machine adapted to configure the dynamic switch element to perform a selected logical operation of a plurality of different logical operations on the data and to output a plurality of first control signals; anda data flow controller adapted to receive the data flow signals and select one of a plurality of operating conditions in accordance with the plurality of first control signals received from the finite state machine and the data flow signals, the operating conditions indicating availability of input data to the dynamic switch element and availability of spaces for receiving output data from the dynamic switch element,wherein the data flow controller is adapted to select one of the plurality of operating conditions prior to the input data being available and output a second control signal to the finite state machine for operating the dynamic switch element to perform the selected logical operation in accordance with the selected operating condition, and wherein the data flow controller causes the finite state machine to configure the dynamic switch element to perform:a first selected logical operation, when all selected input signals are asserted and all selected output conditions are asserted,a second selected logical operation, when any selected input signal is asserted and all selected output conditions are asserted,a third selected logical operation, when all selected input signals are asserted and any selected output conditions is asserted, anda fourth selected logical operation, when any selected input signal is asserted and any selected output conditions is asserted, wherein the configurable element does not have a program counter.