Processor safety test control systems and methods
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G01M-017/00
G06F-011/22
G07C-005/08
출원번호
US-0150646
(2011-06-01)
등록번호
US-9122662
(2015-09-01)
발명자
/ 주소
Faucett, James Mason
Costin, Mark H.
Tarby, David Dean
Downs, Jr., Aubrey Walter
출원인 / 주소
Faucett, James Mason
인용정보
피인용 횟수 :
0인용 특허 :
31
초록▼
First, second, and third processor modules selectively execute a test having N test states while an ignition system of the vehicle is off. N is an integer greater than one. The N test states each include: the first processor module setting a first output to a first predetermined value for one of the
First, second, and third processor modules selectively execute a test having N test states while an ignition system of the vehicle is off. N is an integer greater than one. The N test states each include: the first processor module setting a first output to a first predetermined value for one of the N test states; the second processor module setting a second output to a second predetermined value for the one of the N test states; the third processor module setting a third output to a third predetermined value for the one of the N test states; a predetermined expectation for the one of the N test states; and at least one of the first, second, and third processor modules indicating a fault when a fourth output is different than the predetermined expectation. A control module sets the fourth output based on the first, second, and third outputs.
대표청구항▼
1. A system of a vehicle, comprising: first, second, and third processor modules that selectively execute a test having N test states while an ignition system of the vehicle is off,wherein N is an integer greater than one and the N test states each include: the first processor module setting a first
1. A system of a vehicle, comprising: first, second, and third processor modules that selectively execute a test having N test states while an ignition system of the vehicle is off,wherein N is an integer greater than one and the N test states each include: the first processor module setting a first output to a first predetermined value for one of the N test states;the second processor module setting a second output to a second predetermined value for the one of the N test states;the third processor module selling a third output to a third predetermined value for the one of the N test states;a predetermined expectation for the one of the N test states; andat least one of the first, second, and third processor modules indicating a fault when a fourth output is different than the predetermined expectation; anda control module that sets the fourth output based on the first, second, and third outputs. 2. The system of claim 1 wherein: the first processor module generates a fifth output; andthe control module sets the fourth output to one of the second and fifth outputs based on the first, second, and third outputs. 3. The system of claim 2 further comprising a driver module that drives an actuator of the vehicle based on the fourth output. 4. The system of claim 3 wherein the actuator is an electric motor. 5. The system of claim 2 further comprising a motor driver module that applies power to an electric motor of the vehicle based on the fourth output, wherein the control module selectively sets the fourth output to the fifth output when the ignition system of the vehicle is on. 6. The system of claim 5 wherein the control module sets the fourth output to the second output when the ignition system of the vehicle is on and a fault has been indicated. 7. The system of claim 5 wherein, when the ignition system of the vehicle is on, the first processor module generates the fifth output based on a torque request generated by the second processor module for the electric motor. 8. The system of claim 1 wherein: the first processor module generates a fifth output;the second processor module generates a sixth output; andthe control module sets the fourth output to one of the second, fifth, and sixth outputs based on the first, second, third, and sixth outputs. 9. The system of claim 1 wherein: the first processor module transmits a first state signal to the second processor module, the first state signal indicating one of the N test states;the second processor module transmits a second state signal to the first and third processor modules, the second state signal indicating one of the N test states;the third processor module transmits a third state signal to the second processor module, the third state signal indicating one of the N test states; andthe first, second, and third processor modules selectively enter one of the N test states based on the first, second, and third state signals. 10. The system of claim 9 wherein: the first and third processor modules enter a next one of the N test states when the second state signal is the same as the first and third state signals, respectively;the second processor module enters the next one of the N test states when the first and third signals indicate the next one of the N test states; andthe first, second, and third processor modules execute the next one of the N test states when the first, second, and third signals indicate the next one of the N test states. 11. A method comprising: selectively executing a test having N test states using first, second, and third processor modules while an ignition system of a vehicle is off,wherein N is an integer greater than one and the N test states each include: setting a first output to a first predetermined value for one of the N test states using the first processor module;setting a second output to a second predetermined value for the one of the N test states using the second processor module;setting a third output to a third predetermined value for the one of the N test states using the third processor module;a predetermined expectation for the one of the N test states; andindicating a fault when a fourth output is different than the predetermined expectation using at least one of the first, second, and third processor modules; andsetting the fourth output based on the first, second, and third outputs using a control module. 12. The method of claim 11 further comprising: generating a fifth output using the first processor module; andsetting the fourth output to one of the second and fifth outputs based on the first, second, and third outputs using the control module. 13. The method of claim 12 further comprising driving an actuator of the vehicle based on the fourth output. 14. The method of claim 12 further comprising driving an electric motor of the vehicle based on the fourth output. 15. The method of claim 12 further comprising: applying power to an electric motor of the vehicle based on the fourth output; andselectively setting the fourth output to the fifth output when the ignition system of the vehicle is on using the control module. 16. The method of claim 15 further comprising setting the fourth output to the second output when the ignition system of the vehicle is on and a fault has been indicated using the control module. 17. The method of claim 15 further comprising, when the ignition system of the vehicle is on, generating the fifth output using the first processor module based on a torque request generated by the second processor module for the electric motor. 18. The method of claim 11 further comprising: generating a fifth output using the first processor module;generating a sixth output using the second processor module; andsetting the fourth output to one of the second, fifth, and sixth outputs based on the first, second, third, and sixth outputs using the control module. 19. The method of claim 11 further comprising: transmitting a first state signal to the second processor module using the first processor module, the first state signal indicating one of the N test states;transmitting a second state signal to the first and third processor modules using the second processor module, the second state signal indicating one of the N test states;transmitting a third state signal to the second processor module using the third processor module, the third state signal indicating one of the N test states; andselectively entering one of the N test states using the first, second, and third processor modules based on the first, second, and third state signals. 20. The method of claim 19 further comprising: entering a next one of the N test states using the first and third processor modules when the second state signal is the same as the first and third state signals, respectively;entering the next one of the N test states using the second processor module when the first and third signals indicate the next one of the N test states; andexecuting the next one of the N test states using the first, second, and third processor modules when the first, second, and third signals indicate the next one of the N test states.
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이 특허에 인용된 특허 (31)
Simon, Jr., Robert C.; Wozniak, Leonard G.; Livshiz, Michael; Whitney, Christopher E.; Folkerts, Charles H.; Chynoweth, Scott J.; Stroh, David J., Association of torque requesting modules in a coordinated torque architecture.
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Leonardi, Franco; Huang, Henry Heping; Miller, John Michael; Degner, Michael W., Diagnostic strategy for an electric motor using sensorless control and a position sensor.
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Gerstung Ulrich (Vaihingen/Enz DEX) Hall Dieter (Schwieberdingen DEX) Kirschner Michael (Ludwigsburg DEX) Zimmerman Werner (Stuttgart DEX) Berger Joachim (Winterbach DEX) Grosser Martin (Stuttgart DE, System for controlling a motor vehicle.
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