[미국특허]
Chip having port to receive value that represents adjustment to output driver parameter
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-012/10
G06F-013/40
G06F-013/364
G06F-013/42
출원번호
US-0683290
(2015-04-10)
등록번호
US-9135186
(2015-09-15)
발명자
/ 주소
Horowitz, Mark A.
Hampel, Craig E.
Moncayo, Alfredo
Donnelly, Kevin S.
Zerbe, Jared L.
출원인 / 주소
Rambus Inc.
대리인 / 주소
The Neudeck Law Firm, LLC
인용정보
피인용 횟수 :
0인용 특허 :
145
초록▼
An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance w
An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.
대표청구항▼
1. A flash memory device, comprising: a port to receive, from a controller, information representing at least one parameter for data transfer over a bidirectional bus;a register to store the information;parameter adjustment circuitry to adjust a parameter control signal in accordance with the inform
1. A flash memory device, comprising: a port to receive, from a controller, information representing at least one parameter for data transfer over a bidirectional bus;a register to store the information;parameter adjustment circuitry to adjust a parameter control signal in accordance with the information; and,an output driver to drive an output signal onto the bidirectional bus via the port, the output driver setting a transmission parameter of the output signal in accordance with the parameter control signal. 2. The flash memory device of claim 1, wherein the information is to set the at least one parameter in accordance with a count of memory devices on the bidirectional bus. 3. The flash memory device of claim 1, wherein the transmission parameter of the output signal corresponds to a drive strength of the output driver. 4. The flash memory device of claim 3, wherein the drive strength of the output driver can be set to at least three different values. 5. The flash memory device of claim 1, wherein the at least one parameter is at least one of a drive strength, transmit timing, slew rate, and equalization of the output driver. 6. The flash memory device of claim 1, wherein variations of the transmission parameter result in variation of a slew rate of the output signal. 7. The flash memory device of claim 1, wherein the information is to be selected based on a topology of memory devices on the bidirectional bus. 8. A method of configuring a flash memory device, comprising: receiving from a controller, via a port, information representing at least one parameter for data transfer over a bidirectional bus;storing the information in a register;adjusting a parameter control signal in accordance with the information;setting a transmission parameter of an output signal driven onto the bidirectional bus by an output driver, the transmission parameter of the output signal being set in accordance with the parameter control signal; anddriving, by the output driver, the output signal onto the bidirectional bus via the port. 9. The method of claim 8, wherein the information is based on a count of memory devices on the bidirectional bus. 10. The method of claim 8, wherein the transmission parameter corresponds to a drive strength. 11. The method of claim 10, wherein at least three different values may be selected as the drive strength. 12. The method of claim 8, wherein the transmission parameter affects a slew rate of output signal. 13. The method of claim 8, wherein the transmission parameter of the output signal is at least one of drive strength, transmit timing, slew rate, and equalization. 14. The method of claim 8, wherein the information is based on a topology of the bidirectional bus. 15. A flash memory device, comprising: a port to receive, from a controller, information representing at least one parameter for data transfer over a bidirectional bus;means for storing the information;means for setting a parameter control signal in accordance with the information;means for setting a transmission parameter of an output signal to be driven onto the bidirectional bus, the transmission parameter of the output signal to be set in accordance with the parameter control signal; and,means for driving the output signal onto the bidirectional bus in accordance with the transmission parameter. 16. The flash memory device of claim 15, wherein the information is based on a count of memory devices on the bidirectional bus. 17. The flash memory device of claim 15, wherein the transmission parameter corresponds to a selected drive strength. 18. The flash memory device of claim 17, wherein the selected drive strength may be selected from at least three different values. 19. The flash memory device of claim 15, wherein the transmission parameter affects a slew rate of the means for driving. 20. The flash memory device of claim 15, wherein the information is based on a topology of memory devices on the bidirectional bus.
White Richard E. (2591 College Hill Cir. Schaumburg IL 60193) Buchholz Dale R. (1441 E. Anderson Palatine IL 60067) Freeburg Thomas A. (416 N. Belmont Ave. Arlington Heights IL 60004) Chang Hungkun J, Addressing technique for storing and referencing packet data.
Horowitz Mark A. ; Barth Richard M. ; Hampel Craig E. ; Moncayo Alfredo ; Donnelly Kevin S. ; Zerbe Jared L., Apparatus and method for topography dependent signaling.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Apparatus and method for topography dependent signaling.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Apparatus and method for topography dependent signaling.
Zerbe, Jared LeVan; Donnelly, Kevin S.; Sidiropoulos, Stefanos; Stark, Donald C.; Horowitz, Mark A.; Yu, Leung; Vu, Roxanne; Kim, Jun; Garlepp, Bruno W.; Ho, Tsyr-Chyang; Lau, Benedict Chung-Kwong, Bus system optimization.
Stark, Donald C.; Kim, Jun; Knorpp, Kurt T.; Ching, Michael Tak-Kei; Kushiyama, Natsuki, Charge compensation control circuit and method for use with output driver.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Chip having register to store value that represents adjustment to reference voltage.
Horowitz, Mark A.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Chip having register to store value that represents adjustment to reference voltage.
Garrett ; Jr. Billy Wayne ; Dillon ; deceased John B. ; Ching Michael Tak-Kei ; Stonecypher William F. ; Chan Andy Peng-Pui ; Griffin Matthew M., Current control technique.
Garrett ; Jr. Billy Wayne ; Dillon John B. ; Ching Michael Tak-Kei ; Stonecypher William F. ; Chan Andy Peng-Pui ; Griffin Matthew M., Current control technique.
Cavaliere Joseph R. (Hopewell Junction NY) Smith ; III George E. (Wappingers Falls NY), Current switch logic circuit with controlled output signal levels.
Dunlop Alfred E. (Murray Hill NJ) Gabara Thaddeus J. (North Whitehall Township ; Lehigh County PA) Knauer Scott C. (Mountainside NJ), Digitally controlled element sizing.
Tedrow Kerry D. (Orangevale CA) Keeney Stephen N. (Sunnyvale CA) Fazio Albert (Los Gatos CA) Atwood Gregory E. (San Jose CA) Javanifard Johnny (Sacramento CA) Wojciechowski Kenneth (Folsom CA), High precision voltage regulation circuit for programming multiple bit flash memory.
Marbot Roland (Versailles FRX) Le Bihan Jean-Claude (Montrouge FRX) Cofler Andrew (Paris FRX) Nezamzadeh-Moosavi Reza (Bois d\Arcy FRX), Impedance adaptation process and device for a transmitter and/or receiver, integrated circuit and transmission system.
Fourcroy Antone L. (Austin TX) McDermott Mark W. (Austin TX) Smallwood James C. (Austin TX), Input/output circuit with programmable input sensing time.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Integrated circuit device and signaling method with topographic dependent equalization coefficient.
Horowitz,Mark A.; Barth,Richard M.; Hampel,Craig E.; Moncayo,Alfredo; Donnelly,Kevin S.; Zerbe,Jared L., Integrated circuit device that stores a value representative of an equalization co-efficient setting.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., Memory controller and method utilizing equalization co-efficient setting.
David B. Gustavson ; David V. James ; Hans A. Wiggers ; Peter B. Gillingham CA; Cormac M. O'Connell CA; Bruce Millar CA; Jean Crepeau CA; Kevin J. Ryan ; Terry R. Lee ; Brent Keeth ; Troy A, Memory system having synchronous-link DRAM (SLDRAM) devices and controller.
Garrett, Jr., Billy Wayne; Dillon, John B.; Ching, Michael Tak-Kei; Stonecypher, William F.; Chan, Andy Peng-Pui; Griffin, Matthew M., Memory system including a memory device having a controlled output driver characteristic.
Baker Russel Jacob ; Manning Troy A., Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same.
Keeth Brent, Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same.
Barth Richard M. ; Tsern Ely K. ; Hampel Craig E. ; Ware Frederick A. ; Bystrom Todd W. ; May Bradley A. ; Davis Paul G., Method and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domain.
Keeth Brent ; Manning Troy A. ; Martin Chris G. ; Pierce Kim M. ; Fister Wallace E. ; Ryan Kevin J. ; Lee Terry R. ; Pearson Mike ; Voshell Thomas W., Method and apparatus for memory array compressed data testing.
Li Hsi-Pin,TWX ; Liang Jui-Fang,TWX ; Tsai Cheng-Fu,TWX, Method and device for controlling discharging current slope of wire cut electrical discharge machine.
Cook Sherri E. (Boca Raton FL) McNeill ; Jr. Andrew B. (Deerfield Beach FL), Method for selecting transmission speeds for transmitting data packets over a serial bus.
Johnston Robert J. ; Trieu Tuong ; Sambandan Sachidanandan, Output buffer with current paths having different current carrying characteristics for providing programmable slew rate.
Suzuki Masayoshi (Hitachiota JPX) Horii Hidesato (Katsuta JPX), Power semiconductor device including an arrangement for controlling load current by independent control of a plurality o.
Ruedinger Jeffrey J. (Rochester MN) Rudolph Peter (Schnaich DEX) Schulze Schlling Hermann (Grtringen DEX), Quasi-synchronous information transfer and phase alignment means for enabling same.
Patel Hitesh N. (8610 Causeway Houston TX 77083) Hohl Jakob H. (10249 E. Placita Cresta Feliz Tucson AZ 85749) Palusinski Olgierd A. (Dept. of ECE ; Univ. of Arizona Tucson AZ 85719), Self adjusting CMOS transmission line driver.
Garrett, Jr., Billy Wayne; Dillon, John B.; Dillon, Nancy David; Ching, Michael Tak-Kei; Stonecypher, William F.; Chan, Andy Peng-Pui; Griffin, Matthew M., Semiconductor controller device having a controlled output driver characteristic.
Billy Wayne Garrett, Jr. ; John B. Dillon ; by Nancy David Dillon ; Michael Tak-Kei Ching ; William F. Stonecypher ; Andy Peng-Pui Chan ; Matthew M. Griffin, Semiconductor memory device having a controlled output driver characteristic.
Buchholz Dale R. (Palatine IL) Freeburg Thomas A. (Arlington Heights IL) Chang Hungkun J. (Hoffman Estates IL) Nolan Michael P. (Lake Zurich IL) Odlyzko Paul (Arlington Heights IL) McGrath James D. (, Synchronization method and apparatus for a wireless packet network.
Horowitz, Mark A.; Barth, Richard M.; Hampel, Craig E.; Moncayo, Alfredo; Donnelly, Kevin S.; Zerbe, Jared L., System and dynamic random access memory device having a receiver.
Lau Benedict C. ; Wei Jason ; Ho Tsyr-Chyang ; Patel Samir A. ; Chan Yiu-Fai, System for adjusting slew rate on an output of a drive circuit by enabling a plurality of pre-drivers and a plurality of output drivers.
Garrett, Jr., Billy Wayne; Dillon, legal representative, Nancy David; Ching, Michael Tak-Kei; Stonecynher, William E.; Chan, Andy Peng-Pui; Griffin, Matthew M., System including an integrated circuit memory device having an adjustable output voltage setting.
Cox Dennis T. (Rochester MN) Guertin David L. (Rochester MN) Johnson Charles L. (Rochester MN) Rudolph Bruce G. (Rochester MN) Turner Mark E. (Colchester VT) Williams Robert R. (Rochester MN), VLSI performance compensation for off-chip drivers and clock generation.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.