초록

Systems and method relating generally to data processing, and more particularly to systems and methods for data synchronization and detection.

대표청구항 ▼

1. A data processing system, the system comprising: a sync mark identification circuit operable to: identify a sync mark pattern in a data input within a first window of time to yield a first sync found output, wherein the sync mark within the first window of time is identified when a comparison met

1. A data processing system, the system comprising: a sync mark identification circuit operable to: identify a sync mark pattern in a data input within a first window of time to yield a first sync found output, wherein the sync mark within the first window of time is identified when a comparison metric is less than a threshold value;identify the sync mark pattern in the data input within a second window of time to yield a second sync found output, wherein the sync mark within the second window of time is identified as a location in the data input where the comparison metric is the lowest value within the second window and is less than the threshold value; andan alignment circuit operable to align a processing input derived from the data input based upon a combination of the first sync found output and the second sync found output to yield an aligned output. 2. The data processing system of claim 1, the data processing system further comprising: a data processing circuit operable to apply a data processing algorithm to the aligned output to yield a data output. 3. The data processing system of claim 1, the data processing system further comprising: an equalizer circuit operable to equalize the data input to yield the processing input. 4. The data processing system of claim 1, wherein the processing input is the same as the data input. 5. The data processing system of claim 1, wherein the data processing system is implemented as part of a device selected from a group consisting of: a storage device, and a communication device. 6. The data processing system of claim 1, wherein the data processing system is implemented as part of an integrated circuit. 7. The data processing system of claim 1, wherein the sync mark identification circuit includes at least one of: a Euclidean distance calculation circuit and an absolute value calculation circuit. 8. The data processing system of claim 1, wherein the location of the location of the second window of time is based on an input selected from a group consisting of: a location of the first window of time; anda location of a sync mark found outside of the data input including the sync mark pattern in the first window of time and the sync mark pattern in the second window of time. 9. The data processing system of claim 1, wherein the first sync found output indicates a location of a sync found and a quality of the sync found, wherein when the quality of the sync found is high, aligning the processing input is based only on the location of the sync found. 10. The data processing system of claim 1, wherein the first sync found output indicates a location of a sync found and a quality of the sync found, wherein when the quality of the sync found is low, aligning the processing input is based on the second sync found output and one of an end of the first window or the location of the sync found plus a defined offset. 11. The data processing system of claim 1, wherein the first sync found output indicates a missing sync found, wherein aligning the processing input is based upon the end of the first window and the second sync found. 12. The data processing system of claim 1, wherein the first window of time corresponds to a series of data preceding a data fragment, and wherein the second window of time corresponds to a series of data following the data fragment. 13. A method for data processing, the method comprising: comparing a data input with a sync mark pattern to yield multiple instances of a comparison metric;comparing at least one of the multiple instances of the comparison metric within a first window of time with a threshold value;asserting a first sync found output when one of the multiple instances of the comparison metric is less than the threshold value within the first window of time;asserting a second sync found output at a location corresponding to the lowest value of the instances of the comparison metric within a second window of time where the lowest value of the instances of the comparison metric within a second window of time is less than the threshold value; andaligning a processing input derived from the data input using an alignment circuit based upon a combination of the first sync found output and the second sync found output to yield an aligned output. 14. The method of claim 13, the method further comprising: applying a data processing algorithm to the processing input to yield a data output. 15. The method of claim 13, wherein the method further comprises: equalizing the data input to yield the processing input. 16. The method of claim 13, wherein comparing the first portion of the data input with the sync mark pattern within the first window is selected from a group consisting of: a Euclidean distance comparison, and an absolute value comparison. 17. The method of claim 13, wherein comparing the second portion of the data input with the sync mark pattern within the second window is selected from a group consisting of: a Euclidean distance comparison, and an absolute value comparison. 18. The method of claim 13, wherein the first sync found output indicates a location of a sync found and a quality of the sync found, wherein when the quality of the sync found is high, aligning the processing input is based only on the location of the sync found. 19. The method of claim 13, wherein the first sync found output indicates a location of a sync found and a quality of the sync found, wherein when the quality of the sync found is low, aligning the processing input is based on the second sync found output and one of an end of the first window or the location of the sync found plus a defined offset. 20. The method of claim 13, wherein the first sync found output indicates a missing sync found, wherein aligning the processing input is based upon the end of the first window and the second sync found.