Diagnosis of over-current conditions in bipolar motor controllers
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H02H-007/09
H02P-008/36
H02P-008/02
H02P-008/12
H02H-007/122
G01R-031/34
출원번호
US-0467554
(2014-08-25)
등록번호
US-9325267
(2016-04-26)
발명자
/ 주소
Barth, Martin
출원인 / 주소
Infineon Technologies AG
대리인 / 주소
Slater & Matsil, L.L.P.
인용정보
피인용 횟수 :
0인용 특허 :
15
초록▼
A circuit for controlling a load current through a coil is connected to an output port of a transistor H-bridge that includes two low side transistors and two high side transistors. A current sense circuit is coupled to the H-bridge and configured to provide a representation of the load current prov
A circuit for controlling a load current through a coil is connected to an output port of a transistor H-bridge that includes two low side transistors and two high side transistors. A current sense circuit is coupled to the H-bridge and configured to provide a representation of the load current provided by the output port. A current regulator is configured to generate a modulated signal dependent on the representation of the load current and a current set-point. The modulated signal has a duty-cycle. A gate control logic drives the individual transistors of the H-bridge on and off in accordance with the modulated signal. A direction signal provides the load current to the coil. The direction signal determines the direction of the load current. An over current detection circuit is coupled to each individual transistor and is configured to signal an over-current by providing an active over-current failure signal when a transistor current through the respective transistor exceeds a respective maximum value.
대표청구항▼
1. A circuit for controlling a load current through a coil connected to an output port of a transistor H-bridge comprising two low side transistors and two high side transistors, the circuit comprising: a first interface circuit configured to receive a representation of the load current provided by
1. A circuit for controlling a load current through a coil connected to an output port of a transistor H-bridge comprising two low side transistors and two high side transistors, the circuit comprising: a first interface circuit configured to receive a representation of the load current provided by the output port from an output of a current sense circuit coupled to the H-bridge;a current regulator configured to generate a modulated signal dependent on the representation of the load current and a current set-point, the modulated signal having a duty cycle;gate control logic for driving individual transistors of the H-bridge on and off in accordance with the modulated signal and a direction signal so as to provide the load current to the coil, the direction signal determining a direction of the load current;a second interface circuit configured to receive a plurality of overcurrent measurement signals from individual overcurrent detection circuits coupled to individual transistors, wherein each individual overcurrent detection circuit is configured to signal an over-current by providing an active over-current failure signal when a transistor current through the individual transistor exceeds a respective maximum value; anda duty cycle measuring circuit configured to monitor the duty cycle of the modulated signal and to signal an open coil failure when the duty cycle of the modulated signal exceeds a maximum duty cycle. 2. The circuit of claim 1, wherein the duty cycle measuring circuit is configured to signal a shorted coil failure circuit when the duty cycle of the modulated signal exceeds a minimum duty cycle for a number of times. 3. The circuit of claim 2, further comprising an evaluation unit configured to increment a counter value at an end of each time step when the minimum duty cycle is detected and to decrement the counter value if no minimum duty cycle is detected, the incrementing the counter value and decrementing the counter value being prevented when a current set-point is zero. 4. The circuit of claim 1, further comprising an evaluation unit configured to identify an actual cause of the open coil failure dependent on the over-current failure signal. 5. The circuit of claim 4, wherein the evaluation unit is further configured to determine whether there is a short between a first terminal of the coil to ground or between the coil and a supply potential. 6. The circuit of claim 4, wherein the evaluation unit is further configured to identify whether the actual cause of the open coil failure is a short from a first terminal of the coil to ground, a short from the first terminal of the coil to a supply potential, a short from a second terminal of the coil to ground, a short from the second terminal of the coil to the supply potential, or a short in the coil. 7. The circuit of claim 1, wherein the second interface circuit is further configured to determine whether a first high side transistor of the two high side transistors is shut-down, whether a first low side transistor of the two low side transistors is shut down, and whether an over-current has been sensed by a sense resistor. 8. The circuit of claim 1, wherein the current regulator is further configured to adjust the duty cycle of the modulated signal in accordance with the load current and a current set-point. 9. The circuit of claim 1, wherein the over-current failure signal indicates a cause of a failure. 10. The circuit of claim 1, further comprising the current sense circuit. 11. The circuit of claim 1, further comprising the individual overcurrent detection circuits. 12. The circuit of claim 1, wherein upon occurrence of an over-current failure signal, the direction signal is inverted to provide an inverted load current to the coil. 13. A method of controlling a load current through a coil connected to an output port of a transistor H-bridge comprising two low side transistors and two high side transistors, the method comprising: receiving a representation of the load current provided by the output port from an output of a current sense circuit coupled to the H-bridge;generating a modulated signal dependent on the representation of the load current and a current set-point, the modulated signal having a duty cycle;driving individual transistors of the H-bridge on and off in accordance with the modulated signal and a direction signal so as to provide the load current to the coil, the direction signal determining a direction of the load current;receiving a plurality of overcurrent measurement signals from individual overcurrent detection circuits coupled to individual transistors, wherein each individual overcurrent detection circuit is configured to signal an over-current by providing an active over-current failure signal when a transistor current through the individual transistor exceeds a respective maximum value;monitoring a duty cycle of the modulated signal; andsignaling an open coil failure when the duty cycle of the modulated signal exceeds a maximum duty cycle. 14. The method of claim 13, further comprising identifying an actual cause of the open coil failure dependent on the over-current failure signal. 15. The method of claim 13, further comprising signaling a shorted coil failure circuit when the duty cycle of the modulated signal exceeds a minimum duty cycle for a number of times. 16. The method of claim 15, further comprising determining whether a first high side transistor of the two high side transistors is shut-down, whether a first low side transistor of the two low side transistors is shut down, and whether an over-current has been sensed by a sense resistor. 17. A circuit for controlling a load current through a coil connected to an output port of a transistor H-bridge comprising two low side transistors and two high side transistors, the circuit comprising: a first interface circuit configured to receive a representation of the load current provided by the output port from an output of a current sense circuit coupled to the H-bridge;a current regulator configured to generate a modulated signal dependent on the representation of the load current and a current set-point, the modulated signal having a duty cycle;gate control logic for driving individual transistors of the H-bridge on and off in accordance with the modulated signal and a direction signal so as to provide the load current to the coil, the direction signal determining a direction of the load current; anda second interface circuit configured to receive a plurality of overcurrent measurement signals from individual overcurrent detection circuits coupled to individual transistors, wherein each individual overcurrent detection circuit is configured to signal an over-current by providing an active over-current failure signal when a transistor current through the individual transistor exceeds a respective maximum value, wherein upon occurrence of an over-current failure signal, the direction signal is inverted to provide an inverted load current to the coil. 18. The circuit of claim 17, wherein the over-current failure signal indicates a cause of a failure. 19. The circuit of claim 17, further comprising the current sense circuit. 20. The circuit of claim 17, further comprising the individual overcurrent detection circuits.
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이 특허에 인용된 특허 (15)
Giordano Raymond Louis (Flemington NJ), Automatic fault monitoring system and motor control system incorporating same.
Bilotti Alberto (Florida ARX) Tallarico Jose L. (Buenos Aires ARX), Bridge motor driver with short-circuit protection and motor-current limiting feature.
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