Method and system for allowing no code download in a code download scheme
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-021/76
G06F-009/44
출원번호
US-0740575
(2007-04-26)
등록번호
US-9652637
(2017-05-16)
발명자
/ 주소
Dellow, Andrew
Chen, Iue-Shuenn
Rodgers, Stephane (Steve)
Chen, Xuemin (Sherman)
출원인 / 주소
Avago Technologies General IP (Singapore) Pte. Ltd.
대리인 / 주소
Sterne, Kessler, Goldstein & Fox PLLC
인용정보
피인용 횟수 :
0인용 특허 :
55
초록▼
Aspects of a method and system for allowing no code download in a code download scheme are provided. A system-on-a-chip (SoC) may comprise a security processor, a ROM, and a one-time-programmable (OTP) memory. The security processor may enable fetching code from a restricted function portion of the
Aspects of a method and system for allowing no code download in a code download scheme are provided. A system-on-a-chip (SoC) may comprise a security processor, a ROM, and a one-time-programmable (OTP) memory. The security processor may enable fetching code from a restricted function portion of the ROM. The restricted functions may comprise code for booting up the SoC and code that prevents enabling security algorithms within the SoC. The security processor may then enable booting up of at least a portion of the SoC based on the fetched code. The remaining portion of the ROM may comprise code for downloading security code from an external memory, such as a FLASH memory, to an internal memory, such as a RAM, to boot up the SoC. Access to the restricted function portion or the remaining portion of the ROM is based on at least one bit from the OTP memory.
대표청구항▼
1. A method for operating an integrated circuit, the method comprising: fetching a first code by a security processor from a restricted function portion of a ROM in a system-on-a-chip (SoC), wherein access to said restricted function portion of said ROM by said security processor is enabled by at le
1. A method for operating an integrated circuit, the method comprising: fetching a first code by a security processor from a restricted function portion of a ROM in a system-on-a-chip (SoC), wherein access to said restricted function portion of said ROM by said security processor is enabled by at least one bit from a one-time-programmable (OTP) memory and said restricted function portion in said ROM comprises a second code that prevents enabling security algorithms within said SoC; andbooting at least a portion of said SoC using said first code fetched from said restricted function portion of said ROM. 2. The method according to claim 1, wherein a remaining portion of said ROM comprises a third code for downloading security code from an external memory to said SoC. 3. The method according to claim 2, wherein said external memory comprises FLASH memory. 4. The method according to claim 2, wherein said external memory comprises DRAM memory. 5. The method according to claim 2, wherein access to said remaining portion of said ROM by said security processor is enabled by at least one bit from said OTP memory. 6. The method according to claim 2, wherein said security code from said external memory is downloaded into an internal memory within said SoC. 7. The method according to claim 6, wherein said internal memory comprises RAM. 8. The method according to claim 6, wherein at least a portion of said SoC is booted up based on said security code downloaded into said internal memory. 9. A non-transitory computer readable medium having stored thereon instructions which when executed by a computational device, cause the computational device to: fetch a first code by a security processor from a restricted function portion of a ROM in a system-on-a-chip (SoC), wherein access to said restricted function portion of said ROM by said security processor is enabled by at least one bit from a one-time-programmable (OTP) memory, and wherein said restricted function portion in said ROM comprises a second code that prevents enabling security algorithms within said SoC; andboot at least a portion of said SoC using said first code fetched from said restricted function portion of said ROM. 10. The non-transitory computer readable medium according to claim 9, wherein a remaining portion of said ROM comprises a third code for downloading security code from an external memory to said SoC. 11. The non-transitory computer readable medium according to claim 10, wherein said external memory comprises FLASH memory. 12. The non-transitory computer readable medium according to claim 10, wherein said external memory comprises DRAM memory. 13. The non-transitory computer readable medium according to claim 10, wherein access to said remaining portion of said ROM by said security processor is enabled by at least one bit from said OTP memory. 14. The non-transitory computer readable medium according to claim 10, wherein said security code from said external memory is downloaded into an internal memory within said SoC. 15. The non-transitory computer readable medium according to claim 14, wherein said internal memory comprises RAM. 16. The non-transitory computer readable medium according to claim 14, wherein at least a portion of said SoC is booted up based on said security code downloaded into said internal memory. 17. A system for operating an integrated circuit, the system comprising: a system-on-a-chip (SoC) comprising a security processor, a ROM, and a one-time-programmable (OTP) memory;wherein said security processor is configured to fetch a first code from a restricted function portion of said ROM, wherein access to said restricted function portion of said ROM by said security processor is enabled by at least one bit from said OTP memory, wherein said restricted function portion in said ROM comprises a second code that prevents enabling security algorithms within said SoC, and whereinsaid security processor is further configured to boot at least a portion of said SoC using said first code fetched from said restricted function portion of said ROM. 18. The system according to claim 17, wherein a remaining portion of said ROM comprises a third code for downloading security code from an external memory to said SoC. 19. The system according to claim 18, wherein said external memory comprises FLASH memory. 20. The system according to claim 18, wherein said external memory comprises DRAM memory. 21. The system according to claim 18, wherein access to said remaining portion of said ROM by said security processor is enabled by at least one bit from said OTP memory. 22. The system according to claim 18, wherein said security code from said external memory is downloaded into an internal memory within said SoC. 23. The system according to claim 22, wherein said internal memory comprises RAM. 24. The system according to claim 22, wherein at least a portion of said SoC is booted up based on said security code downloaded into said internal memory.
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