Wafer bonding method and device with reduced thermal expansion
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/683
H01L-029/06
H01L-021/78
H01L-021/50
H01L-023/544
출원번호
US-0860721
(2015-09-22)
등록번호
US-9721824
(2017-08-01)
우선권정보
TW-104115136 A (2015-05-13)
발명자
/ 주소
Chen, Kuan-Wei
Tzeng, Pei-Jer
Chen, Chien-Chou
Chang, Po-Chih
출원인 / 주소
Industrial Technology Research Institute
대리인 / 주소
Jianq Chyun IP Office
인용정보
피인용 횟수 :
0인용 특허 :
12
초록▼
A bonding structure including a first substrate, a second substrate, and an adhesive layer is provided. The first substrate has a plurality of first trenches. The adhesive layer is located between the first substrate and the second substrate, and the first trenches are filled with the adhesive layer
A bonding structure including a first substrate, a second substrate, and an adhesive layer is provided. The first substrate has a plurality of first trenches. The adhesive layer is located between the first substrate and the second substrate, and the first trenches are filled with the adhesive layer.
대표청구항▼
1. A bonding structure comprising: a first substrate having a plurality of first trenches, wherein there is no device in the first trench;a second substrate having a plurality of second trenches, wherein the first substrate is a wafer, the second substrate is a carrier, and the wafer has a plurality
1. A bonding structure comprising: a first substrate having a plurality of first trenches, wherein there is no device in the first trench;a second substrate having a plurality of second trenches, wherein the first substrate is a wafer, the second substrate is a carrier, and the wafer has a plurality of scribe lines, wherein device portions are arranged among the scribe lines, and the first trenches are located in the scribe lines; andan adhesive layer located between the first substrate and the second substrate, wherein the first trenches are filled with the adhesive layer. 2. The bonding structure of claim 1, wherein the second trenches correspond to the device portions, and the first trenches and the second trenches are alternately arranged. 3. The bonding structure of claim 1, wherein the first trenches and the second trenches correspond to each other. 4. The bonding structure of claim 1, wherein the first trenches constitute a continuous structure having a plurality of columns and a plurality of rows, and the columns and the rows intersect and are connected, so as to form a plurality of intersections. 5. The bonding structure of claim 4, wherein shapes of the intersections are the same. 6. The bonding structure of claim 4, wherein shapes of the intersections are different. 7. The bonding structure of claim 1, wherein the first trenches constitute a discontinuous structure having a plurality of units, and the units are alternately arranged and are disconnected. 8. A die structure comprising: a substrate, the substrate including a device region and a scribe line region, wherein a top surface of the substrate in the device region and a top surface of the substrate in the scribe line region has a step, the scribe line region is a trench, and the top surface of the scribe line region is bare; anda device portion located on the device region of the substrate, wherein a sidewall of the substrate is step-shaped,wherein no device is in the scribe line region. 9. The die structure of claim 8, wherein the substrate comprises a main portion and a protruding portion, the main portion is located below the device portion, the protruding portion is located on one portion of a sidewall of the main portion, an angle is formed between the other portion of the sidewall of the main portion and a top surface of the protruding portion, and the angle is an obtuse angle or an acute angle. 10. The die structure of claim 9, wherein the angle is from 70 degrees to 135 degrees. 11. A bonding structure comprising: a first substrate, the first substrate is a wafer, and the wafer has a plurality of scribe lines, device portions are arranged among the scribe lines;a second substrate having a plurality of trenches, wherein the second substrate is a carrier, there is no device in the trench, and the trenches and the scribe lines are alternately arranged; andan adhesive layer located between the first substrate and the second substrate, wherein the trenches are filled with the adhesive layer. 12. The bonding structure of claim 11, wherein the trenches constitute a continuous structure having a plurality of columns and a plurality of rows, and the columns and the rows intersect and are connected, so as to form a plurality of intersections. 13. The bonding structure of claim 11, wherein the trenches constitute a discontinuous structure having a plurality of units, and the units are alternately arranged and are disconnected.
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이 특허에 인용된 특허 (12)
Martin, John R.; Frey, Timothy J.; Tsau, Christine H., Apparatus and method of wafer bonding using compatible alloy.
Gary A. Kneezel ; Daniel E. Kuhman ; Brian T. Ormond ; Ackerman C. John ; Almon P. Fisher ; Allan F. Camp ; Lawrence H. Herko, Methods of forming semiconductor structure.
Ji, Sang-wook; Mun, Hyoung-yol; Park, Yeong-Iyeol; Cho, Tae-je, Wafer processing method and method of manufacturing semiconductor device by using the same.
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