Memory read-channel with signal processing on general purpose processor
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-003/00
G06F-013/38
G06F-011/10
G06F-003/06
G06F-005/10
출원번호
US-0510980
(2009-11-30)
등록번호
US-9753877
(2017-09-05)
국제출원번호
PCT/US2009/066094
(2009-11-30)
§371/§102 date
20120521
(20120521)
국제공개번호
WO2011/065958
(2011-06-03)
발명자
/ 주소
Graef, Nils
Haratsch, Erich F.
출원인 / 주소
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
대리인 / 주소
Sheridan Ross P.C.
인용정보
피인용 횟수 :
0인용 특허 :
3
초록▼
Methods and apparatus are provided for processing a data value in a read channel of a memory device. The data value provided to a general purpose processor for processing. The data value is not decoded data and may comprise one or more of a raw data value and an intermediate data value. The data val
Methods and apparatus are provided for processing a data value in a read channel of a memory device. The data value provided to a general purpose processor for processing. The data value is not decoded data and may comprise one or more of a raw data value and an intermediate data value. The data value can be provided to the general purpose processor, for example, upon a detection of one or more predefined trigger conditions. A data value can be obtained from a memory device and then be redirected to a general purpose processor. The data value is not decoded data. The redirection can be conditionally performed if one or more predefined bypass conditions exist. The general purpose processor is optionally time-shared with one or more additional applications.
대표청구항▼
1. A method for processing information in a read channel, said method comprising: receiving a data set, wherein the data set includes at least one data value;applying a data decode algorithm to the data set by a decoder to yield a decoded output; andselecting between the at least one data value and
1. A method for processing information in a read channel, said method comprising: receiving a data set, wherein the data set includes at least one data value;applying a data decode algorithm to the data set by a decoder to yield a decoded output; andselecting between the at least one data value and at least one element of the decoded output to be provided for processing by a general purpose processor. 2. The method of claim 1, wherein said selecting is based at least in part upon a detection of one or more predefined trigger conditions. 3. The method of claim 2, wherein said one or more predefined trigger conditions comprise detection of a decoding failure. 4. The method of claim 2, wherein said one or more predefined trigger conditions comprise one or more of a detection of a decoding failure, low reliability of detected or decoded data, a desire to process said data value offline and a desire to process said data value at a lower data rate. 5. The method of claim 1, wherein the method further comprises: accessing a storage medium, wherein the data set is derived from accessing the storage medium. 6. The method of claim 1, wherein said selecting is performed by a multiplexer. 7. The method of claim 1, wherein said at least one data value comprises one or more of hard information and soft information. 8. The method of claim 1, wherein said at least one data value comprises one or more of a raw data value and an intermediate data value. 9. The method of claim 8, further comprising storing one or more of said raw and intermediate data values in a buffer prior to selecting between the at least one data value and at least one element of the decoded output. 10. The method of claim 1, wherein said general purpose processor implements one or more of a signal processing algorithm, decoding algorithm and an error floor mitigation scheme. 11. The method of claim 10, wherein said data decode algorithm is an LDPC decoding algorithm. 12. The method of claim 11, wherein said LDPC decoding algorithm comprises one or more of a Belief Propagation, Message Passing, Sum-Product and Min-Sum algorithm. 13. The method of claim 1, wherein said general purpose processor implements one or more of a Viterbi detection, soft-output Viterbi detection, maximum-a-posteriori (MAP) detection and BCJR (Bahl-Cocke-Jelinek-Raviv) detection functions. 14. The method of claim 1, wherein said general purpose processor implements one or more of an intercell interference mitigation algorithm and a soft demapping algorithm. 15. The method of claim 1, wherein said general purpose processor is provided by a host CPU. 16. The method of claim 1, wherein said general purpose processor sequentially implements a plurality of signal processing algorithms. 17. The method of claim 16, wherein said signal processing algorithms are sequentially implemented until said at least one data value is successfully decoded. 18. The method of claim 16, wherein said signal processing algorithms are sequentially implemented with one or more of increased precision and increased complexity. 19. A method for processing at least one data value obtained from a memory device, said method comprising: receiving said at least one data value, wherein the at least one data value is included in a data set;applying a data decode algorithm to the data set by a decoder to yield a decoded output; andredirecting said at least one data value to a general purpose processor in place of a corresponding element of the decoded output, wherein said at least one data value is not decoded data. 20. The method of claim 19, further comprising conditionally performing said redirecting step if one or more predefined bypass conditions exist. 21. The method of claim 20, wherein the predefined conditions comprise one or more of detection of a decoding failure, low reliability of detected or decoded data, a requirement to process the at least one data value offline and a requirement to process the at least one data value at a lower data rate. 22. The method of claim 20, wherein said general purpose processor is time-shared with one or more additional applications. 23. The method of claim 20, wherein said redirecting is performed using one or more of a multiplexer and bypass tap inputs. 24. A system for processing information, comprising: a storage device; andat least one processor, coupled to the memory, operative to: receive a data set;applying a data decode algorithm to the data set by a decoder to yield a decoded output; andselecting between at least one element of the data set and at least one element of the decoded output to be provided for processing by a general purpose processor. 25. A method for processing at least one data value accessed from a storage medium as part of a data set, said method comprising: receiving said at least one data value;applying a data decode algorithm to the data set by a decoder to yield a decoded output;detecting one or more predefined trigger conditions; andbased at least in part upon detecting the one or more predefined trigger conditions, processing said at least one data value using a general purpose processor. 26. The method of claim 25, wherein the method further comprises: accessing the storage medium. 27. The method of claim 25, wherein said at least one data value comprises one or more of a raw data value and an intermediate data value. 28. The method of claim 27, further comprising: storing one or more of said raw and intermediate data values in a buffer prior to said processing step. 29. The method of claim 25, wherein said storage medium is a flash memory device. 30. The method of claim 25, wherein said general purpose processor is provided by a host CPU. 31. The method of claim 25, wherein said one or more predefined trigger conditions comprise detection of a decoding failure. 32. The method of claim 25, wherein said one or more predefined trigger conditions comprise one or more of a detection of a decoding failure, low reliability of detected or decoded data, a desire to process said data value offline and a desire to process said data value at a lower data rate. 33. The method of claim 25, wherein said processing includes selectively providing said at least one data value for processing by said general purpose processor. 34. The method of claim 33, wherein said selectively providing said at least one data value is performed by a multiplexer. 35. The method of claim 25, wherein said at least one data value comprises one or more of hard information and soft information. 36. The method of claim 25, wherein said general purpose processor implements one or more of a signal processing algorithm, decoding algorithm and an error floor mitigation scheme. 37. The method of claim 36, wherein said data decode algorithm is an LDPC decoding algorithm. 38. The method of claim 37, wherein said LDPC decoding algorithm comprises one or more of a Belief Propagation, Message Passing, Sum-Product and Min-Sum algorithm. 39. The method of claim 25, wherein said general purpose processor implements one or more of a Viterbi detection, soft-output Viterbi detection, maximum-a-posteriori (MAP) detection and BCJR (Bahl-Cocke-Jelinek-Raviv) detection functions. 40. The method of claim 25, wherein said general purpose processor sequentially implements a plurality of signal processing algorithms. 41. The method of claim 40, wherein said signal processing algorithms are sequentially implemented until said at least one data value is successfully decoded. 42. The method of claim 40, wherein said signal processing algorithms are sequentially implemented with one or more of increased precision and increased complexity. 43. The method of claim 25, wherein said general purpose processor implements one or more of an intercell interference mitigation algorithm and a soft demapping algorithm.
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이 특허에 인용된 특허 (3)
Howarth, James J.; Hutchins, Robert A., Apparatus and method to read information from an information storage medium.
Bush Aubrey M. (Atlanta GA) Schimm ; Jr. John F. (Norcross GA), Convolutional encoder and sequential decoder with parallel architecture and block coding properties.
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