Device and method for an electronic circuit having a driver and rectifier
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H03K-003/017
H03K-017/74
H03K-017/16
출원번호
US-0990354
(2016-01-07)
등록번호
US-9755639
(2017-09-05)
발명자
/ 주소
Kampl, Severin
Kutschak, Matteo-Alessandro
출원인 / 주소
Infineon Technologies Austria AG
대리인 / 주소
Slater Matsil, LLP
인용정보
피인용 횟수 :
0인용 특허 :
5
초록▼
In accordance with an embodiment, a method includes driving a transistor device by a driver having an output coupled to a control node of the transistor through a capacitor and limiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device b
In accordance with an embodiment, a method includes driving a transistor device by a driver having an output coupled to a control node of the transistor through a capacitor and limiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device by a rectifier circuit.
대표청구항▼
1. An electronic circuit, comprising: a transistor device comprising a control node and a first load node;a driver having an input configured to receive an input signal and at least one output comprising a first output configured to provide a first drive signal based on the input signal, and a secon
1. An electronic circuit, comprising: a transistor device comprising a control node and a first load node;a driver having an input configured to receive an input signal and at least one output comprising a first output configured to provide a first drive signal based on the input signal, and a second output configured to provide a second drive signal based on the input signal;a capacitor coupled between the at least one output and the control node of the transistor device, wherein each of the first output and the second output is coupled to the capacitor; anda rectifier circuit connected between the first load node and the control node of the transistor device. 2. The electronic circuit of claim 1, wherein the rectifier circuit is integrated with the transistor device. 3. The electronic circuit of claim 1, wherein the transistor device has wide-bandgap properties. 4. The electronic circuit of claim 3, wherein the transistor device is a GaN device, the control node is a gate node and the first load node is a source node. 5. The electronic circuit of claim 4, wherein the GaN device is a GaN GIT device. 6. The electronic circuit of claim 1, further comprising a first resistor connected in parallel with the capacitor. 7. The electronic circuit of claim 6, further comprising a second resistor coupled between the at least one output and the first resistor. 8. The electronic circuit of claim 1, further comprising a first resistor and a second resistor, wherein the second resistor is coupled in series with the capacitor to form a series circuit, and the first resistor is coupled in parallel with the series circuit. 9. The electronic circuit of claim 1, wherein the rectifier circuit comprises at least one bipolar diode. 10. The electronic circuit of claim 1, wherein the rectifier circuit comprises a plurality of bipolar diodes connected in series. 11. The electronic circuit of claim 1, wherein the rectifier circuit comprises a series circuit with a bipolar diode and a Zener diode connected back-to-back. 12. The electronic circuit of claim 1, further comprising: a first resistor coupled in parallel with the capacitor;a second resistor coupled between the first output and the capacitor; anda third resistor coupled between the second output and the capacitor. 13. The electronic circuit of claim 1, further comprising a second resistor connected between the first output and the capacitor. 14. The electronic circuit of claim 1, further comprising a third resistor connected between the second output and the capacitor. 15. The electronic circuit of claim 1, wherein a reference terminal of the driver and a reference terminal are coupled to a reference node. 16. The electronic circuit of claim 15, wherein the reference node is a ground node. 17. A drive circuit, comprising: an output comprising a first output node configured to be connected to a gate node of a transistor device and a second output node configured to be connected to a first load node of the transistor device;a driver having an input configured to receive an input signal and at least one output configured to provide a drive signal based on the input signal, wherein the driver comprises a first output configured to provide a first drive signal based on the input signal and a second output configured to provide a second drive signal based on the input signal;a capacitor coupled between the at least one output of the driver and the first output node, wherein each of the first output and the second output is coupled to the capacitor; anda rectifier circuit connected between the second output node and the first output node. 18. The drive circuit of claim 17, further comprising: a first resistor connected in parallel with the capacitor. 19. The drive circuit of claim 17, wherein the rectifier circuit comprises at least one bipolar diode. 20. The drive circuit of claim 17, wherein the rectifier circuit comprises a plurality of bipolar diodes connected in series. 21. The drive circuit of claim 17, wherein the rectifier circuit comprises a series circuit with a bipolar diode and a Zener diode connected back-to-back. 22. The drive circuit of claim 17, further comprising: a first resistor coupled in parallel with the capacitor;a second resistor coupled between the first output and the capacitor; anda third resistor coupled between the second output and the capacitor. 23. The drive circuit of claim 17, further comprising: a second resistor connected between the first output and the capacitor. 24. The drive circuit of claim 17, further comprising: a third resistor connected between the second output and the capacitor. 25. A method, comprising: driving a transistor device by a driver having an output coupled to a control node of the transistor device through a capacitor, wherein the driver is configured to provide a drive signal at the output based on an input signal, the driver comprises a first output configured to provide a first drive signal based on the input signal and a second output configured to provide a second drive signal based on the input signal, and each of the first output and the second output is coupled to the capacitor; andlimiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device by a rectifier circuit. 26. The method of claim 25, wherein the transistor device has wide-bandgap properties. 27. The method of claim 26, wherein the transistor device is a GaN device. 28. The method of claim 27, wherein the GaN device is a GaN GIT device. 29. The method of claim 25, wherein the voltage of the one polarity is a negative voltage between the control node and the first load node.
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이 특허에 인용된 특허 (5)
Wittenbreder, Jr., Ernest Henry, Adaptive switch timing circuits for zero voltage switching power converters.
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