초록 ▼

There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers; and a plurality of internal electrodes disposed within the ceramic body, having the dielectric layer interposed therebetween, wherein, on a cross section of the ceramic body in a width-thickness d

There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers; and a plurality of internal electrodes disposed within the ceramic body, having the dielectric layer interposed therebetween, wherein, on a cross section of the ceramic body in a width-thickness direction thereof, when a distance between an uppermost internal electrode and a lowermost internal electrode measured at centers thereof in a width direction thereof is defined as a and a distance between the uppermost internal electrode and the lowermost internal electrode measured at edges thereof in the width direction thereof is defined as b, 0.953≦a/b≦0.996 is satisfied.

대표청구항 ▼

1. A multilayer ceramic capacitor comprising: a ceramic body including dielectric layers, the ceramic body being capable of mounting a printed circuit board and comprising a mounting surface being able to face the printed circuit board; anda plurality of internal electrodes disposed within the ceram

1. A multilayer ceramic capacitor comprising: a ceramic body including dielectric layers, the ceramic body being capable of mounting a printed circuit board and comprising a mounting surface being able to face the printed circuit board; anda plurality of internal electrodes disposed within the ceramic body, having at least one the dielectric layers interposed therebetween, stacked along a thickness direction, and being parallel with respect to the mounting surface,wherein an uppermost internal electrode is in the highest position and a lowermost internal electrode is in the lowest position, with respect to the thickness direction among a plurality of internal electrodes being parallel to the mounting surface, andwherein, on a cross section of the ceramic body in a width-thickness direction thereof, when a distance between the uppermost internal electrode and the lowermost internal electrode measured at centers thereof in a width direction thereof is defined as a and a distance between the uppermost internal electrode and the lowermost internal electrode measured at edges thereof in the width direction thereof is defined as b, 0.953≦a/b≦0.996 is satisfied. 2. The multilayer ceramic capacitor of claim 1, wherein edge portions of the ceramic body in a width direction thereof are thicker than a central portion thereof in the width direction. 3. The multilayer ceramic capacitor of claim 1, wherein the internal electrodes include non-electrode portions. 4. The multilayer ceramic capacitor of claim 1, wherein the internal electrodes include at least one selected from a group consisting of nickel (Ni), manganese (Mn), chrome (Cr), copper (Cu), palladium (Pd), silver (Ag), cobalt (Co), and aluminum (Al). 5. The multilayer ceramic capacitor of claim 3, wherein the non-electrode portions include a ceramic material. 6. The multi layer ceramic capacitor of claim 3, wherein the non-electrode portions include at least one of barium titanate and a barium titanate oxide. 7. The multilayer ceramic capacitor of claim 1, wherein the internal electrodes have a thickness of 0.1 μm to 0.5 μm. 8. A method of manufacturing a multilayer ceramic capacitor, the method comprising: preparing a plurality of ceramic green sheets;producing a conductive paste for internal electrodes including a conductive powder and a ceramic additive;forming internal electrode patterns on the ceramic green sheets using the conductive paste for internal electrodes;stacking the ceramic green sheets having the internal electrode patterns formed thereon to form a multilayer body;cutting the multilayer body while allowing one ends of the internal electrode patterns to be alternately exposed, to form a multilayer chip;sintering the multilayer chip to form a ceramic body including internal electrodes; andforming external electrodes so as to be electrically connected to the internal electrodes,wherein, on a cross section of the ceramic body in a width-thickness direction thereof, when a distance between an uppermost internal electrode and a lowermost internal electrode measured at centers thereof in a width direction thereof is defined as a and a distance between the uppermost internal electrode and the lowermost internal electrode measured at edges thereof in the width direction thereof is defined as b, 0.953≦a/b≦0.996 is satisfied. 9. The method of claim 8, wherein the multilayer chip is sintered while maintaining the multilayer chip for a predetermined time in two or more temperature sections. 10. The method of claim 8, wherein a content of the ceramic additive is 3 to 14 parts by weight based on 100 parts by weight of the conductive powder. 11. The method of claim 10, wherein when an average particle size of the conductive powder is defined as d1 and an average particle size of the ceramic additive is defined as d2, 0.03≦d2/d1≦0.05 is satisfied. 12. The method of claim 8, wherein a content of the ceramic additive is 6 to 12 parts by weight based on 100 parts by weight of the conductive powder. 13. The method of claim 12, wherein when an average particle size of the conductive powder is defined as d1 and an average particle size of the ceramic additive is defined as d2, 0.05≦d2/d1≦0.1 is satisfied. 14. The method of claim 8, wherein the conductive powder includes at least one selected from a group consisting of nickel (Ni), manganese (Mn), chrome (Cr), copper (Cu), palladium (Pd), silver (Ag), cobalt (Co), and aluminum (Al). 15. The method of claim 8, wherein the ceramic additive includes at least one of barium titanate and a barium titanate oxide. 16. The method of claim 8, wherein edge portions of the ceramic body in a width direction thereof are thicker than a central portion thereof in the width direction. 17. A board having a multilayer ceramic capacitor mounted thereon, the board comprising: a printed circuit board having first and second electrode pads disposed thereon; anda multilayer ceramic capacitor mounted on the printed circuit board, wherein the multilayer ceramic capacitor includes:a ceramic body including dielectric layers, the ceramic body being capable of mounting the printed circuit board and comprising a mounting surface being able to face the printed circuit board; anda plurality of internal electrodes disposed within the ceramic body, having at least one the dielectric layers interposed therebetween, stacked along a thickness direction, and being parallel with respect to the mounting surface,wherein an uppermost internal electrode is in the highest position and a lowermost internal electrode is in the lowest position, with respect to the thickness direction among a plurality of internal electrodes being parallel to the mounting surface, andwherein, on a cross section of the ceramic body in a width-thickness direction thereof, when a distance between the uppermost internal electrode and the lowermost internal electrode measured at centers thereof in a width direction thereof is defined as a and a distance between the uppermost internal electrode and the lowermost internal electrode measured at edges thereof in the width direction thereof is defined as b, 0.953≦a/b≦0.996 is satisfied.