IPC분류정보
| 국가/구분 |
United States(US) Patent
등록
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| 국제특허분류(IPC7판) |
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| 출원번호 |
US-0642597
(2015-03-09)
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| 등록번호 |
US-9857995
(2018-01-02)
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발명자
/ 주소 |
- Malina, James N.
- Sujanto, Totok Sulistiomono
- Dong, Li
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| 출원인 / 주소 |
- Western Digital Technologies, Inc.
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| 대리인 / 주소 |
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| 인용정보 |
피인용 횟수 :
0 인용 특허 :
83 |
초록
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A data storage device is disclosed comprising a volatile memory, a primary and a secondary non-volatile memory (NVM), and control circuitry coupled to the volatile memory and the primary and secondary NVM and configured to write first data to the volatile memory, write the first data from the volati
A data storage device is disclosed comprising a volatile memory, a primary and a secondary non-volatile memory (NVM), and control circuitry coupled to the volatile memory and the primary and secondary NVM and configured to write first data to the volatile memory, write the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM, attempt to write the first data to the primary NVM, wherein, during the attempt to write the first data to the primary NVM, after a portion of the first data has been successfully written to the primary NVM, a corresponding portion of the first data is released from the secondary NVM.
대표청구항
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1. A data storage device comprising: a volatile memory;a primary and a secondary non-volatile memory (NVM);control circuitry coupled to the volatile memory and the primary and the secondary NVM;wherein the control circuitry is configured to: write first data to the volatile memory;write the first da
1. A data storage device comprising: a volatile memory;a primary and a secondary non-volatile memory (NVM);control circuitry coupled to the volatile memory and the primary and the secondary NVM;wherein the control circuitry is configured to: write first data to the volatile memory;write the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM;attempt to write the first data to the primary NVM;wherein, during the attempt to write the first data to the primary NVM, after a portion of the first data has been successfully written to the primary NVM, a corresponding portion of the first data is released from the secondary NVM,wherein the first data is written to the secondary NVM via a first interface and the first data is written to the primary NVM via a second interface, the first interface being slower than the second interface, andwherein the portion of the first data is written to N adjacent data sectors of the primary NVM before the corresponding portion of the first data is released from the secondary NVM, wherein N is a number of data sectors on the primary NVM between adjacent servo sectors. 2. The data storage device as recited in claim 1, wherein the primary NVM comprises a plurality of data tracks having a plurality of data sectors and a plurality of servo sectors that provide information usable to confirm the success of writing the portion of the first data. 3. The data storage device as recited in claim 1, wherein the primary NVM comprises a plurality of data tracks and the first data comprises metadata associated with a first data track of the plurality of data tracks. 4. The data storage device as recited in claim 1, wherein the secondary NVM comprises a plurality of memory banks, and wherein the control circuitry is further configured to configure the secondary NVM as a buffer capable of providing real time protection for the N adjacent data sectors of the first data to be written. 5. The data storage device as recited in claim 1, wherein the control circuitry is further configured to configure the secondary NVM as a write-through buffer. 6. The data storage device as recited in claim 1, wherein the control circuitry is further configured to configure the secondary NVM as a write-behind buffer. 7. The data storage device as recited in claim 1, wherein the control circuitry is further configured to: store, in the secondary NVM, second data that has been previously written in the primary NVM; andif the attempt to write the first data results in corruption of the second data in the primary NVM, restore the corrupted second data in the primary NVM with the second data in the secondary NVM. 8. The data storage device as recited in claim 1, wherein the control circuitry is further configured to: detect an unsafe write environment; andconfigure the secondary NVM as a write-behind buffer. 9. The data storage device as recited in claim 8, wherein the unsafe write environment is a shock or high vibration environment. 10. The data storage device as recited in claim 1, wherein the secondary NVM comprises magnetoresistive random-access memory (MRAM). 11. A data storage device comprising: a volatile memory;a primary and a secondary non-volatile memory;control circuitry coupled to the volatile memory and the primary and the secondary non-volatile memory (NVM);wherein the control circuitry is configured to: write first data to the volatile memory; andwrite the first data from the volatile memory to the secondary NVM and the primary NVM;wherein the first and the second NVM comprise a different type of media, and the first data is written to the secondary NVM via a first interface and the first data is written to the primary NVM via a second interface, the first interface being slower than the second interface, andwherein the first data is written to N adjacent data sectors of the primary NVM before a corresponding portion of the first data is released from the secondary NVM, wherein N is a number of data sectors on the primary NVM between adjacent servo sectors. 12. The data storage device as recited in claim 11, wherein the control circuitry is further configured to write the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM. 13. The data storage device as recited in claim 12, wherein the control circuitry is further configured to configure the secondary NVM as a write-behind buffer and a write-through buffer. 14. The data storage device as recited in claim 11, wherein the control circuitry is further configured to write the first data from the volatile memory concurrently to the secondary NVM and the primary NVM. 15. The data storage device as recited in claim 11, wherein the first interface is a serial peripheral interface. 16. The data storage device as recited in claim 11, wherein the secondary NVM comprises first and second memory banks, and wherein the control circuitry is further configured to configure the first and second memory banks as a ping-pong buffer. 17. The data storage device as recited in claim 16, wherein the control circuitry is further configured to configure the ping-pong buffer to bound an average holding time to a predefined limit. 18. The data storage device as recited in claim 16, wherein the secondary NVM comprises first, second, and third memory banks, and wherein the control circuitry is further configured to configure the first and second memory banks as a first type of buffer. 19. The data storage device as recited in claim 18, wherein the control circuitry is further configured to change in real time the first type of buffer to a second type of buffer, and wherein the second type of buffer comprises the third memory bank and one of the first and second memory banks. 20. The data storage device as recited in claim 19, wherein the first type of buffer is a write-through buffer and the second type of buffer is a write-behind buffer. 21. The data storage device as recited in claim 19, wherein the first type of buffer is a write-behind buffer and the second type of buffer is a write-through buffer. 22. A method of operating a data storage device, the data storage device comprising a volatile memory and a primary and a secondary NVM, the method comprising: writing first data to the volatile memory;writing the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM;attempting to write the first data to the primary NVM;wherein, during the attempt to write the first data to the primary NVM, after a portion of the first data has been successfully written to the primary NVM, releasing a corresponding portion of the first data from the secondary NVM,wherein the first data is written to the secondary NVM via a first interface and the first data is written to the primary NVM via a second interface, the first interface being slower than the second interface, andwherein the portion of the first data is written to N adjacent data sectors of the primary NVM before the corresponding portion of the first data is released from the secondary NVM, wherein N is a number of data sectors on the primary NVM between adjacent servo sectors. 23. The method as recited in claim 22, wherein the secondary NVM comprises a plurality of memory banks, further comprising configuring the secondary NVM as a buffer capable of providing real-time protection for the N adjacent data sectors of the first data to be written. 24. The method as recited in claim 22, further comprising: storing, in the secondary NVM, second data that has been previously written in the primary NVM; andif the attempt to write the first data results in corruption of the second data in the primary NVM, restoring the corrupted second data in the primary NVM with the second data in the secondary NVM. 25. The method as recited in claim 22, further comprising: detecting an unsafe write environment; andconfiguring the secondary NVM as a write-behind buffer. 26. A method of operating a data storage device, the data storage device comprising a volatile memory and a primary and a secondary NVM, the method comprising: writing first data to the volatile memory; andwriting the first data from the volatile memory to the secondary NVM and the primary NVM; wherein the first and the second NVM comprise a different type of media, and wherein the first data is written to the secondary NVM via a first interface and the first data is written to the primary NVM via a second interface, the first interface being slower than the second interface, andwherein the first data is written to N adjacent data sectors of the primary NVM before a corresponding portion of the first data is released from the secondary NVM, wherein N is a number of data sectors on the primary NVM between adjacent servo sectors. 27. The method as recited in claim 26, further comprising writing the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM. 28. The method as recited in claim 26, wherein the secondary NVM comprises first and second memory banks, further comprising configuring the first and second memory banks as a ping-pong buffer. 29. The method as recited in claim 28, further comprising configuring the ping-pong buffer to bound an average holding time to a predefined limit. 30. The method as recited in claim 26, wherein the secondary NVM comprises first, second, third memory banks, further comprising configuring the first and second memory banks as a first type of buffer. 31. The method as recited in claim 30, further comprising changing in real-time the first type of buffer to a second type of buffer, and wherein the second type of buffer comprises the third memory bank and one of the first and second memory banks.
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