A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semico
A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array.
대표청구항▼
1. An image sensor comprising: a first semiconductor part including a plurality of pixels arranged in a first array and an interlayer insulation film having multilayer wirings, respective ones of the pixels including a photoelectric conversion element disposed at a light-incident side of the first s
1. An image sensor comprising: a first semiconductor part including a plurality of pixels arranged in a first array and an interlayer insulation film having multilayer wirings, respective ones of the pixels including a photoelectric conversion element disposed at a light-incident side of the first semiconductor part, wherein the interlayer insulation film is disposed below the photoelectric conversion element in a cross-section perspective, and disposed at a side of the first semiconductor part opposite to the light-incident side, anda second semiconductor part including a plurality of analog/digital converters arranged in a second array; anda third semiconductor part including a memory element array,wherein the first, second, and third semiconductor parts are stacked and electrically connected to one another,the first, second, and third semiconductor parts are electrically connected through a first contact portion and a second contact portion, and at least one of the first contact portion and the second contact portion is disposed through at least a portion of the first, second, and third semiconductor parts,the first contact portion includes a first wiring part, a second wiring part, and a third wiring part that are electrically connected to one another, andthe first wiring part is disposed above a light-incident surface of the first semiconductor part in the cross-section perspective, the second wiring part is connected to the first wiring part and a wiring of the multilayer wirings, and the third wiring part is connected to the first wiring part, is not directly connected to the multilayer wirings, and is disposed through the first semiconductor part such that the first semiconductor part is electrically connected to the second semiconductor part. 2. The image sensor according to claim 1, wherein the first semiconductor part, the second semiconductor part, and the third semiconductor part are stacked in that order. 3. The image sensor according to claim 1, wherein the image sensor is a back-illuminated image sensor, a first surface of the first semiconductor part being opposite from a second surface of the first semiconductor part, and the second surface of the first semiconductor part being on the light-incident side of the first semiconductor part. 4. The image sensor according to claim 3, wherein the first surface of the first semiconductor part is coupled to a first surface of the second semiconductor part by a plurality of electroconductive connection bodies. 5. The image sensor according to claim 4, wherein the electroconductive connection bodies include first pads formed on the first surface of the first semiconductor part, second pads formed on the first surface of the second semiconductor part, respective ones of the first pads corresponding positionally with respective ones of the second pads, and a bump formed between respectively corresponding first pads and second pads. 6. The image sensor according to claim 3, wherein the first semiconductor part includes a transistor region formed toward the first surface of the first semiconductor part and a photodiode region formed toward the second surface of the first semiconductor part, the photodiode region including photodiodes corresponding to respective ones of the plurality of pixels and the transistor region including transistors corresponding to respective ones of the photodiodes. 7. The image sensor according to claim 1, wherein the plurality of pixels are arranged into a plurality of pixel array blocks, andrespective ones of the plurality of analog/digital converters correspond to respective ones of the plurality of pixel array blocks. 8. The image sensor according to claim 1, wherein a first surface of the first semiconductor part is laminated to a first surface of the second semiconductor part. 9. The image sensor according to claim 1, wherein a first surface of the first semiconductor part is bonded to a first surface of the second semiconductor part with an adhesive material. 10. The image sensor according to claim 1, wherein the first and second semiconductor parts are arranged close to the third semiconductor part such that a plurality of photoelectric conversion elements and a plurality of memory elements share one analog/digital converter. 11. The image sensor according to claim 10, wherein each of the memory elements is a volatile memory. 12. The image sensor according to claim 10, wherein each of the memory elements is a floating gate nonvolatile memory. 13. The image sensor according to claim 10, wherein each of the memory elements is an MONOS nonvolatile memory. 14. The image sensor according to claim 10, wherein each of the memory elements is a multivalued nonvolatile memory. 15. A method of making an image sensor module, comprising the steps of: forming a first semiconductor part, the first semiconductor part including a plurality of pixels arranged in a first array and an interlayer insulation film having multilayer wirings, respective ones of the pixels including a photoelectric conversion element disposed at a light-incident side of the first semiconductor part, wherein the interlayer insulation film is disposed below the photoelectric conversion element in a cross-section perspective, and disposed at a side of the first semiconductor part opposite to the light-incident side;forming a second semiconductor part, the second semiconductor part including a plurality of analog/digital converters arranged in a second array;forming a third semiconductor part, the third semiconductor part including a memory element array; andstacking and electrically connecting the first, second, and third semiconductor parts to one another,wherein the first, second, and third semiconductor parts are electrically connected through a first contact portion and a second contact portion, and at least one of the first contact portion and the second contact portion is disposed through at least a portion of the first, second, and third semiconductor parts and extending from a respective first surface of the corresponding at least one of the first, second, and third semiconductor parts,the first contact portion includes a first wiring part, a second wiring part, and a third wiring part that are electrically connected to one another, andthe first wiring part is disposed above a light-incident surface of the first semiconductor part in the cross-section perspective, the second wiring part is connected to the first wiring part and a wiring of the multilayer wirings, and the third wiring part is connected to the first wiring part, is not directly connected to the multilayer wirings, and is disposed through the first semiconductor part such that the first semiconductor part is electrically connected to the second semiconductor part. 16. The method according to claim 15, further comprising: stacking the first semiconductor part, the second semiconductor part, and the third semiconductor part in that order. 17. The method according to claim 15, further comprising: laminating the first semiconductor part to the second semiconductor part. 18. The method according to claim 15, further comprising: bonding a first surface of the first semiconductor part to a first surface of the second semiconductor part. 19. The method according to claim 18, further comprising: forming first pads on the first surface of the first semiconductor part and forming second pads on the first surface of the second semiconductor part, respective ones of the first pads corresponding positionally with respective ones of the second pads, andforming a bump between respectively corresponding first pads and second pads. 20. The method according to claim 15, further comprising: connecting respective ones of the plurality of pixels with a corresponding one of the plurality of analog/digital converters by a through-hole that passes through a wafer. 21. The image sensor according to claim 1, wherein a material of the first contact portion is the same at both a respective first surface of the corresponding at least one of the first, second, and third semiconductor parts and a respective second surface of the corresponding at least one of the first, second, and third semiconductor parts.
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