Hybrid rectifier circuit for rectifying a line current
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H02M-007/217
H02M-003/335
H02M-007/17
H03K-017/687
H02M-001/08
G01R-019/00
H02M-007/23
H02M-001/00
출원번호
US-0786561
(2017-10-17)
등록번호
US-10079554
(2018-09-18)
발명자
/ 주소
Tremblay, Marco
출원인 / 주소
IMALOG INC.
대리인 / 주소
Bereskin & Parr LLP/S.E.N.C.R.L., s.r.l.
인용정보
피인용 횟수 :
0인용 특허 :
14
초록▼
A hybrid rectifier is provided including a top diode for conducting current during a positive current portion of a line current, a top transistor connected in parallel to the top diode, a bottom diode for conducting current during a negative current portion of the line current, and a bottom transist
A hybrid rectifier is provided including a top diode for conducting current during a positive current portion of a line current, a top transistor connected in parallel to the top diode, a bottom diode for conducting current during a negative current portion of the line current, and a bottom transistor connected in parallel to the bottom diode. A hybrid-rectifier controller is connected to the top transistor and the bottom transistor for implementing a transistor control strategy such that, during the positive current portion of the line current, the top diode conducts current and the bottom transistor conducts current only when the line current is below a sinusoidal reference current. Similarly, during the negative current portion of the line current, the bottom diode conducts current and the top transistor conducts current only when the line current is above the sinusoidal reference current.
대표청구항▼
1. A hybrid rectifier circuit for rectifying a line current, comprising: a top rectifier switch comprising a top diode for conducting current during a positive current portion of the line current; anda top transistor connected in parallel to the top diode;a bottom rectifier switch comprising a botto
1. A hybrid rectifier circuit for rectifying a line current, comprising: a top rectifier switch comprising a top diode for conducting current during a positive current portion of the line current; anda top transistor connected in parallel to the top diode;a bottom rectifier switch comprising a bottom diode for conducting current during a negative current portion of the line current; anda bottom transistor connected in parallel to the bottom diode; anda hybrid-rectifier controller connected to the top transistor and the bottom transistor for switching the top transistor and the bottom transistor, such that: during the positive current portion of the line current: switch the bottom transistor so that the bottom transistor conducts current when the line current is below a sinusoidal reference current, andswitch the bottom transistor so that the bottom transistor does not conduct current when the line current is above the sinusoidal reference current; andduring the negative current portion of the line current: switch the top transistor so that the top transistor conducts current when the line current is above the sinusoidal reference current, andswitch the top transistor so that the top transistor does not conduct current when the line current is below the sinusoidal reference current. 2. The hybrid rectifier circuit of claim 1, wherein the line current is a three-phase line current, the top and bottom rectifier switches pertain to a first phase of the three-phase line current, and the hybrid-rectifier controller comprises at least one hybrid-rectifier controller the hybrid rectifier further comprising: a second top rectifier switch comprising a second top diode in parallel with a second top transistor and a second bottom rectifier switch comprising a second bottom transistor and a second bottom diode, the second top and bottom rectifier switches pertaining to a second phase of the three-phase current; anda third top rectifier switch comprising a third top diode in parallel with a third top transistor and a third bottom rectifier switch comprising a third bottom transistor and a third bottom diode, the third top and bottom rectifier switches pertaining to a third phase of the three-phase current;wherein the at least one hybrid-rectifier controller is further configured to: during a positive current portion of the second phase of the line current: switch the second bottom transistor so that the second bottom transistor conducts current when a second line current is below a top reference value, andswitch the second bottom transistor so that the second bottom transistor does not conduct current when the second line current is above the sinusoidal reference current; andduring a negative current portion of the second phase of the line current: switch the second top transistor so that the second top transistor does not conduct current when the second line current is above the sinusoidal reference current, andswitch the second top transistor so that the second top transistor does not conduct current when the second line current is below the sinusoidal reference current;during a positive current portion of the third phase of the line current: switch the third bottom transistor so that the third bottom transistor conducts current when the third line current is below the sinusoidal reference current, andswitch the third bottom transistor so that the third bottom transistor does not conduct current when the third line current is above the sinusoidal reference current; andduring a negative current portion of the third phase of the line current: switch the third top transistor so that the third top transistor conduct current when the third line current is above the sinusoidal reference current, andswitch the third top transistor so that the third top transistor does not conduct current when the third line current is below the sinusoidal reference current. 3. The hybrid rectifier circuit of claim 2, wherein the at least one hybrid-rectifier controller comprises a second hybrid-rectifier controller for controlling the second top transistor and the second bottom transistor, and a third hybrid-rectifier controller for controlling the third top transistor and the third bottom transistor. 4. The hybrid rectifier circuit of claim 1, wherein each of the top and bottom transistors comprises a field-effect transistor (FET). 5. The hybrid rectifier circuit of claim 1, wherein an amplitude of the sinusoidal reference current is adjusted based on a load. 6. The hybrid rectifier circuit of claim 1, wherein an amplitude of the sinusoidal reference current is adjusted based on a comparison of a DC bus voltage and a peak line-to-line voltage. 7. The hybrid rectifier circuit of claim 1, wherein a pulse-width modulator controls the switching of at least one of the top transistor and the bottom transistor. 8. The hybrid rectifier circuit of claim 1, wherein a hysteresis controller controls the switching of at least one of the top transistor and the bottom transistor. 9. A hybrid rectifier for filtering harmonics of a parallel high-power rectifier, comprising: the hybrid rectifier circuit according to claim 1 connected in parallel to the high-power rectifier. 10. A hybrid rectifier circuit for rectifying a line current, comprising: a top transistor for conducting current during a positive current portion of the line current and switching during a negative current portion of the line current;a bottom transistor for conducting current during the negative current portion of the line current and switching during the positive current portion of the line current; anda hybrid-rectifier controller connected to the top transistor and the bottom transistor for switching the top transistor and bottom transistor during the positive portion of the line current when the line current is below a sinusoidal reference current, and switching the bottom transistor and top transistor during the negative portion of the line current when the line current is above the sinusoidal reference current, wherein the line current is a three-phase line current, the top and bottom transistors pertain to a first phase of the three-phase line current, and the hybrid rectifier controller comprises at least one hybrid-rectifier controller, the hybrid rectifier further comprising:a second top transistor and a second bottom transistor, the second top and bottom transistors pertaining to a second phase of the three-phase line current;a third top transistor and a third bottom transistor, the third top and bottom transistors pertaining to a third phase of the three-phase line current;wherein the at least one hybrid-hybrid rectifier controller further switches the second top and bottom transistors during a positive portion of the second phase of the three-phase line current when the second phase of the three-phase line current is below the sinusoidal reference current, switches the second bottom and top transistors during a negative portion of the second phase of the three-phase line current when the second phase of the three-phase line current is above the sinusoidal reference current, switches the third top and bottom transistors during a positive portion of the third phase of the three-phase line current when the third phase of the three-phase line current is below the sinusoidal reference current, and switches the third bottom and top transistors during a negative portion of the third phase of the three-phase line current when the third phase of the three-phase line current is above the sinusoidal reference current. 11. The hybrid rectifier of claim 10, wherein each of the top and bottom transistors comprise a field-effect transistor (FET). 12. The hybrid rectifier of claim 10, wherein the at least one hybrid-rectifier controller comprises a second hybrid-rectifier controller for controlling the second top transistor and second bottom transistor, and a third hybrid-rectifier controller for controlling the third top transistor and the third bottom transistor. 13. A hybrid rectifier circuit for power regeneration, comprising: a top diode for conducting current during a positive current portion of the line current;a top transistor connected in parallel to the top diode;a bottom diode for conducting current during a negative current portion of the line current;a bottom transistor connected in parallel to the bottom diode; anda hybrid-rectifier controller connected to the top transistor and the bottom transistor for measuring a DC bus voltage, and when the DC bus voltage exceeds a regeneration trigger level, switching the top transistor and the bottom transistor, such that: during the positive current portion of the line current: switch the bottom transistor so that the bottom transistor conducts current when the line current is below a sinusoidal reference current, andswitch the bottom transistor so that the bottom transistor does not conduct current when the line current is above the sinusoidal reference current; andduring the negative current portion of the line current: switch the top transistor so that the top transistor conducts current when the line current is above the sinusoidal reference current, andswitch the top transistor so that the top transistor does not conduct current when the line current is below the sinusoidal reference current. 14. The hybrid rectifier circuit of claim 13, further comprising a DC bus voltage protection, wherein the hybrid-rectifier controller further switches the top transistor and the bottom transistor off when the DC bus voltage exceeds a DC bus voltage protection level.
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이 특허에 인용된 특허 (14)
Baker Donal E., Active rectifier utilizing a fixed switching pattern.
Loftus ; Jr. ; deceased Thomas Patrick ; Thomas ; executor by Marvin R. ; Rozman Allen Frank, Low loss synchronous rectifier for application to clamped-mode power converters.
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