An imaging and pulse detection pixel and an array of imaging and pulse detection pixels are provided. Each imaging and pulse detection pixel includes an optical detection device connected directly to a first and second transistor only, a pulse detection circuit that operates on the signal read out f
An imaging and pulse detection pixel and an array of imaging and pulse detection pixels are provided. Each imaging and pulse detection pixel includes an optical detection device connected directly to a first and second transistor only, a pulse detection circuit that operates on the signal read out from the optical detection device and outputs a pulse detection output signal suitable for detection of pulses, and an imaging circuit that operates on a signal read out from the optical detection device and outputs an image output signal suitable for generation of an image. A terminal of the optical detection device is directly connected to only a gate terminal of the first transistor and a non-gate terminal of the second transistor.
대표청구항▼
1. An imaging and pulse detection pixel comprising: an optical detection device connected directly to a first and second transistor only;a pulse detection circuit that operates on a first signal for detection of a pulse, the first signal being read out from the optical detection device and at least
1. An imaging and pulse detection pixel comprising: an optical detection device connected directly to a first and second transistor only;a pulse detection circuit that operates on a first signal for detection of a pulse, the first signal being read out from the optical detection device and at least the first transistor; andan imaging circuit that operates on a second signal for generation of an image, the second signal being read out from the optical detection device and at least the second transistor,wherein a terminal of the optical detection device is directly connected to only a gate terminal of the first transistor and a non-gate terminal of the second transistor. 2. The imaging and pulse detection pixel of claim 1, wherein the terminal of the optical detection device is an anode or cathode, and the non-gate terminal of the second transistor is a source or drain. 3. The imaging and pulse detection pixel of claim 1, wherein the optical detection device and the first and second transistors are included in a portion of the imaging and pulse detection pixel that is shared by the pulse detection circuit and the imaging circuit. 4. The imaging and pulse detection pixel of claim 3, wherein the first and second signals are provided to a remaining portion of the pulse detection circuit and imaging circuit, respectively, wherein the remaining portions of the imaging circuit and the pulse detection circuit are not included in the shared portion. 5. The imaging and pulse detection pixel of claim 1, wherein the first transistor is included in an amplifier. 6. The imaging and pulse detection pixel of claim 5, wherein the amplifier is a single ended amplifier. 7. The imaging and pulse detection pixel of claim 5, wherein the amplifier is a differential amplifier. 8. The imaging and pulse detection pixel of claim 1, further comprising a pulse processing circuit, wherein output from the pulse detection circuit is provided to the pulse processing circuit that identifies a presence of a pulse in the output from the pulse detection circuit. 9. An imaging and pulse detection pixel array, the imaging pixel array comprising: a plurality of imaging and pulse detection pixels, each of the imaging and pulse detection pixels comprising: an optical detection device connected directly to a first and second transistor only;a pulse detection circuit that operates on a first signal for detection of a pulse, the first signal being read out from the optical detection device and at least the first transistor; andan imaging circuit that operates on a second signal for generation of an image, the second signal being read out from the optical detection device and at least the second transistor,wherein a terminal of the optical detection device is directly connected to only a gate terminal of the first transistor and a non-gate terminal of the second transistor. 10. The imaging and pulse detection pixel array of claim 9, wherein the terminal of the optical detection device is an anode or cathode, and the non-gate terminal of the second transistor is a source or drain. 11. The imaging and pulse detection pixel array of claim 9, wherein the optical detection device and the first and second transistors are included in a portion of the imaging and pulse detection pixel that is shared by the pulse detection circuit and the imaging circuit. 12. The imaging and pulse detection pixel array of claim 11, wherein the first and second signals are provided to a remaining portion of the pulse detection circuit and imaging circuit, respectively, wherein the remaining portions of the imaging circuit and the pulse detection circuit are not included in the shared portion. 13. The imaging and pulse detection pixel array of claim 9, wherein the first transistor is included in an amplifier and the second transistor is a switching element. 14. The imaging and pulse detection pixel array of claim 13, wherein the amplifier is a single ended amplifier. 15. The imaging and pulse detection pixel array of claim 13, wherein the amplifier is a differential amplifier. 16. The imaging and pulse detection pixel array of claim 9, further comprising a pulse processing circuit, wherein output from the pulse detection circuit is provided to the pulse processing circuit that identifies a presence of a pulse in the output from the pulse detection circuit. 17. The imaging and pulse detection pixel array of claim 9, wherein the imaging and pulse detection array is provided on a single integrated chip. 18. The imaging and pulse detection pixel array of claim 17, wherein the single integrated chip is a readout integrated circuit (ROIC).
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이 특허에 인용된 특허 (14)
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