초록 ▼

A system for obtaining measurements for a device under test (DUT) includes a vector network analyzer including a storage medium and a controller for controlling a sweep and a trigger driver configured to provide a synchronization signal to the DUT and the controller to synchronize internal signal co

A system for obtaining measurements for a device under test (DUT) includes a vector network analyzer including a storage medium and a controller for controlling a sweep and a trigger driver configured to provide a synchronization signal to the DUT and the controller to synchronize internal signal components of the vector network analyzer including signal sources, local oscillators (LOs) and an analog-to-digital converter (ADC) clock. A signal is received by the vector network analyzer in response to a test signal generated and transmitted to the DUT. Data related to the received signal is acquired and stored in at the storage medium. The controller inserts a mark into the time record based on an event of the sweep for identifying data from the received signal associated with the event within the time record.

대표청구항 ▼

1. A system for obtaining measurements for a device under test (DUT) comprising: a vector network analyzer including a storage medium and a controller for controlling a sweep;a trigger driver configured to provide a synchronization signal to the controller to synchronize internal signal components o

1. A system for obtaining measurements for a device under test (DUT) comprising: a vector network analyzer including a storage medium and a controller for controlling a sweep;a trigger driver configured to provide a synchronization signal to the controller to synchronize internal signal components of the vector network analyzer including signal sources, local oscillators (LOs) and an analog-to-digital converter (ADC) clock;wherein the trigger driver further synchronizes the DUT and the vector network analyzer;wherein when the vector network analyzer generates and transmits a test signal to the DUT, a signal is received by the vector network analyzer in response to the test signal and data related to the received signal is acquired and stored in a time record at the storage medium;wherein the controller inserts a mark into the time record based on an event of the sweep for identifying acquired data related to the received signal associated with the event within the time record. 2. The system of claim 1, wherein the trigger driver is external to the vector network analyzer and the synchronization signal is provided to the vector network analyzer. 3. The system of claim 2, wherein the trigger driver is associated with the DUT and activates or otherwise initiates an action of the DUT. 4. The system of claim 1, wherein the trigger driver is a component of the vector network analyzer. 5. The system of claim 1, wherein synchronizing internal components of vector network analyzer and the DUT, including synchronizing, via the controller, signals sources, LOs, and an ADC clock of the vector network analyzer includes adjusting timing based on the synchronization signal and latencies to each of the internal components and to the DUT. 6. The system of claim 1, wherein the controller is configured to initiate and perform a sweep of frequency or power independent of data acquisition and wherein the data is acquired continuously and for each step of the sweep. 7. The system of claim 6, wherein the controller inserts the mark into the time record based on a change in step in the sweep for identifying the change in step within the time record. 8. The system of claim 7, wherein the test signal is a pulsed test signal and wherein each step in the sweep corresponds to an integer number of pulses of the pulsed test signal. 9. A method of obtaining measurements for a device under test (DUT) using a vector network analyzer (VNA), comprising: using a vector network analyzer including a storage medium and a controller for controlling a sweep;using a trigger driver to provide a synchronization signal to the DUT and the controller to synchronize internal signal components of the vector network analyzer including signal sources, local oscillators (LOs) and an analog-to-digital converter (ADC) clock and the DUT;performing, using the VNA, a sweep on the DUT including generating and transmitting a test signal to the DUT;receiving a signal in response to the test signal using the vector network analyzer;acquiring data related to the received signal and storing the acquired data in a time record at the storage medium; andmarking the time record based on an event of the sweep for identifying data within the time record related to the received signal associated with the event within the time record. 10. The method of claim 9, wherein the trigger driver is external to the vector network analyzer and the synchronization signal is provided to the vector network analyzer. 11. The method of claim 10, wherein the trigger driver is associated with the DUT and activates or otherwise initiates an action of the DUT. 12. The method of claim 9, wherein the trigger driver is a component of the vector network analyzer. 13. The method of claim 9, wherein synchronizing internal components of vector network analyzer and the DUT, including synchronizing, via the controller, signals sources, LOs, and an ADC clock of the vector network analyzer includes adjusting timing based on the synchronization signal and latencies to each of the internal components and to the DUT. 14. The method of claim 9, wherein the controller is configured to initiate and perform a sweep of frequency or power independent of data acquisition and wherein the data is acquired continuously and for each step of the sweep. 15. The system of claim 14, wherein the controller inserts the mark into the time record based on a change in step in the sweep for identifying the change in step within the time record. 16. The system of claim 15, wherein the test signal is a pulsed test signal and wherein each step in the sweep corresponds to an integer number of pulses of the pulsed test signal. 17. A non-transitory computer readable storage medium having instructions thereon that when read by one or more processors causes the processors to perform the steps comprising: using a vector network analyzer including a storage medium and a controller for controlling a sweep;using a trigger driver to provide a synchronization signal to the DUT and the controller to synchronize internal signal components of the vector network analyzer including signal sources, local oscillators (LOs) and an analog-to-digital converter (ADC) clock and the DUT;performing, using the VNA, a sweep on the DUT including generating and transmitting a test signal to the DUT;receiving a signal in response to the test signal using the vector network analyzer;acquiring data related to the received signal and storing the acquired data in a time record at the storage medium; andmarking the time record based on an event of the sweep for identifying data within the time record related to the response signal associated with the event within the time record. 18. The non-transitory computer readable storage medium of claim 17, having instructions thereon that when read by one or more processors causes the processors to perform the further steps comprising: synchronizing internal components of vector network analyzer and the DUT, including synchronizing, via the controller, signals sources, LOs, and an ADC clock of the vector network analyzer by adjusting timing based on the synchronization signal and latencies to each of the internal components and to the DUT. 19. The non-transitory computer readable storage medium of claim 17, having instructions thereon that when read by one or more processors causes the processors to perform the further steps comprising: initiating and performing a sweep of frequency or power independent of data acquisition and wherein the data is acquired continuously and for each step of the sweep. 20. The non-transitory computer readable storage medium of claim 19, having instructions thereon that when read by one or more processors causes the processors to perform the further steps comprising: inserting the mark into the time record based on a change in step in the sweep for identifying the change in step within the time record; andgenerating a pulsed test signal, wherein each step in the sweep corresponds to an integer number of pulses of the pulsed test signal.