Battery parameter-based power management for suppressing power spikes
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
G06F-001/26
G06F-001/32
G06F-001/3212
G06F-001/329
G06F-001/3287
G06F-001/3206
G01R-031/36
출원번호
US-0613372
(2017-06-05)
등록번호
US-10228747
(2019-03-12)
발명자
/ 주소
Chandra, Ranveer
Hodges, Stephen E.
Meinershagen, Julia L.
Priyantha, Nissanka Arachchige Bodhi
Badam, Anirudh
Moscibroda, Thomas
Hu, Pan
Ferrese, Anthony John
Skiani, Evangelia
출원인 / 주소
Microsoft Technology Licensing, LLC
대리인 / 주소
Schwegman Lundberg & Woessner, P.A.
인용정보
피인용 횟수 :
0인용 특허 :
111
초록▼
This document describes techniques and apparatuses for suppressing power spikes. In some embodiments, these techniques and apparatuses determine an available amount of power that a battery is capable of providing while maintaining a particular voltage level and a requisite amount of power that compo
This document describes techniques and apparatuses for suppressing power spikes. In some embodiments, these techniques and apparatuses determine an available amount of power that a battery is capable of providing while maintaining a particular voltage level and a requisite amount of power that components will consume to perform a task. When the requisite amount of power exceeds the available amount of power, execution of the task or other tasks can be rescheduled effective to enable the battery to maintain the particular voltage level.
대표청구항▼
1. A computer-implemented method comprising: determining, for an upcoming point in time, an available amount of power that a battery of a computing device is capable of providing while maintaining a predefined voltage level, wherein the predefined voltage level is at or above a cutoff voltage level
1. A computer-implemented method comprising: determining, for an upcoming point in time, an available amount of power that a battery of a computing device is capable of providing while maintaining a predefined voltage level, wherein the predefined voltage level is at or above a cutoff voltage level at which the computing device ceases to operate;determining, for the upcoming point in time, a requisite amount of power that components of the computing device will consume to perform multiple tasks at their respective power states, wherein maintaining the predefined voltage level is effective to enable the computing device to continue to operate while the components consume the requisite amount of power; andrescheduling, responsive to determining that the requisite amount of power exceeds the available amount of power, at least one of the multiple tasks to reduce the amount of requisite power that the components consume at the upcoming point in time effective to enable the battery to maintain the predefined voltage level. 2. The computer-implemented method as described in claim 1, wherein the available amount of power is determined based on an open circuit potential, internal resistance, or load current of the battery. 3. The computer-implemented method as described in claim 1, wherein the upcoming point of time is part of a time slot and the multiple tasks are scheduled for execution during the time slot. 4. The computer-implemented method as described in claim 3, wherein rescheduling the at least one task comprises rescheduling the at least one task for execution during another time slot. 5. The computer-implemented method as described in claim 4, wherein the time slot and other time slots are time slots of an operating system (OS) scheduling component of the computing device. 6. The computer-implemented method as described in claim 1, wherein the requisite amount of power that the components will consume is determined based on respective power states of the components. 7. The computer-implemented method as described in claim 1, wherein at least one of the multiple tasks is part of a thread, application, or operating system that is executing on the computing device. 8. A computer-implemented method comprising: receiving an indication that a task is scheduled for execution at an upcoming point in time;determining that a requisite amount of power that resources of a device will consume, while maintaining a predefined voltage level, to perform the task and other tasks scheduled for execution at the upcoming point in time exceeds an available amount of power that a battery of the device can provide, wherein the predefined voltage level is at or above a cutoff voltage level at which the computing device ceases to operate and the predefined voltage level is effective to enable the computing device to continue to operate while the components consume the requisite amount of power;determining, responsive to determining that the requisite amount of power exceeds the available amount of power, which ones of the other tasks have respective priority levels that are lower than a priority level of the task; andrescheduling at least one of the other tasks with a lower priority level to reduce the amount of requisite power that the components consume at the upcoming point in time such that the requisite power does not exceed the available amount of power when the task is performed. 9. The computer-implemented method as described in claim 8, wherein the available amount of power is determined based on an open circuit potential, internal resistance, or load current of the battery. 10. The computer-implemented method as described in claim 8, wherein the upcoming point of time for which the task is scheduled for execution is part of a time slot and the other tasks are scheduled for execution during the time slot. 11. The computer-implemented method as described in claim 10, wherein rescheduling the at least one other task comprises rescheduling the at least one other task for execution during another time slot. 12. The computer-implemented method as described in claim 8, wherein the at least one other task having the lower respective priority level is background task of an operating system or application. 13. The computer-implemented method as described in claim 8, further comprising: identifying which of the resources are associated with execution of the task;determining interdependencies between the resources associated with execution of the task; anddetermining, based on the interdependencies of the resources, a sequence for utilizing the resources such that an amount of power consumed to execute the task is minimized. 14. The computer-implemented method as described in claim 8, further comprising: determining, prior to determining the requisite amount of power, an acceptable level of quality at with the task can be performed; andreducing the level of quality at which the task is performed effective to reduce the requisite amount of power that the resources of the device will consume to perform the task. 15. A system comprising: a battery from which the system draws power to operate;hardware-based resources by which the system performs tasks;a power manager configured to perform operations comprising:determining, for an upcoming point in time, an available amount of power that the battery of the system is capable of providing while maintaining a particular voltage level, wherein the particular voltage level is at or above a cutoff voltage level at which the computing device ceases to operate;determining, for the upcoming point in time, a requisite amount of power that the hardware-based resources will consume to perform the tasks at their respective power states, wherein maintaining the particular voltage level is effective to enable the computing device to continue to overate while the components consume the requisite amount of power; andrescheduling, responsive to determining that the requisite amount of power exceeds the available amount of power, at least one of the tasks to reduce the amount of requisite power that the hardware-based resources consume at the upcoming point in time effective to enable the battery to maintain the particular voltage level. 16. The system as described in claim 15, wherein the available amount of power that the battery is capable of providing is determined based on an open circuit potential, internal resistance, and load current of the battery. 17. The system as described in claim 15, wherein: the upcoming point of time is part of a time slot and the multiple tasks are scheduled for execution during the time slot; andrescheduling the at least one task comprises rescheduling the at least one task for execution during another time slot. 18. The system as described in claim 15, wherein the hardware-based resources of the system comprise at least one of a processing resource, memory resource, display resource, graphics processing resource, communication resource, or mass storage resource.
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이 특허에 인용된 특허 (111)
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