초록

가. 과제 목표 : 리튬이온계 2차전지 protection 및 Monitoring IC
다. 과제 목표의 평가 항목 및 방법
(1) 평가항목
(2) 평가방법
라. 기술 개발 내용
(1) 온도센서
(2) 전압센서
(3) 전류센서
(4) Digital control Block 및 I2C interface

Abstract ▼

The ADTM01 High-Precision Li+ Battery Monitor is a data acquisition, information storage, and safety protection device tailored for cost-sensitive battery pack applications. This low-power device integrates precise temperature, voltage, and current measurement, nonvolatile data storage, and Li+ prot

The ADTM01 High-Precision Li+ Battery Monitor is a data acquisition, information storage, and safety protection device tailored for cost-sensitive battery pack applications. This low-power device integrates precise temperature, voltage, and current measurement, nonvolatile data storage, and Li+ protection into the small footprint of either a TSSOP package or flip chip.
The ADTM01 is a key component in applications including remaining capacity estimation, safety monitoring, and battery-specific data storage.
Via its 1-Wire interface, the ADTM01 gives the host system read/write access to status and control registers, instrumentation registers, and general purpose data storage. Each device has a unique factoryprogrammed 64-bit net address which allows it to be individually addressed by the host system, supporting multi-battery operation.
The ADTM01 is capable of performing temperature, voltage and current measurement to a resolution sufficient to support process monitoring applications such as battery charge control, remaining capacity estimation, and safety monitoring. Temperature is measured using an on-chip sensor, eliminating the need for a separate thermistor. Bidirectional current measurement and accumulation are accomplished using either an internal 25m$\gamma$ sense resistor or an external device.
The ADTM01 also features a programmable I/O pin that allows the host system to sense and control other electronics in the pack, including switches, vibration motors, speakers and LEDs.
Three types of memory are provided on the ADTM01 for battery information storage: EEPROM, lockable EEPROM and SRAM.
EEPROM memory saves important battery data in true nonvolatile memory that is unaffected by severe battery depletion, accidental shorts or ESD events. Lockable EEPROM becomes ROM when locked to provide additional security for unchanging battery data. SRAM provides inexpensive storage for
temporary data.

목차 Contents

• 제출문 ...1
• 요약문 ...2
• SUMMARY ...8
• CONTENTS ...10
• 목차 ...16
• 제1장 서 론 ...22
• 제1절. 개발 기술의 필요성(중요성) ...22
• 1. 기술적 측면 ...22
• 가. 국내/외 Battery 개발 Trend ...22
• 나. 왜 Li+ 전지인가 ...24
• 다. 리튬 이온 전지의 특징 ...25
• 라. 리튬 이온 전지의 문제점 ...26
• 마. Battery Protection IC ...27
• 바. Battery Monitoring IC ...28
• 2. 기업적 측면 ...30
• 제2절. 국내/외 관련 기술의 현황 및 전망 ...31
• 1. 세계적 기술 현황 및 전망 ...31
• 2. 국내 기술 현황 ...31
• 3. 제안 기술과 관련된 국내/외 동일 또는 유사 기술의 개발 또는 상용화 ...31
• 제3절. 개발 기술의 파급효과 ...32
• 제2장 개발 기술의 내용과 범위 ...34
• 제1절. 연구개발의 내용 및 범위 ...34
• 1. 과제 목표 ...34
• 2. 과제 목표의 평가 항목 및 방법 ...35
• 가. 평가항목 ...35
• 나. 평가방법 ...35
• 3. 과제에 필요한 기술 개발 내용 ...36
• 4. 과제목표 달성에 필요한 소요 핵심기술 및 확보 유무 ...37
• 5. 과제 수행 Flow ...38
• 제3장 연구 개발 결과(Battery Protection IC) ...39
• 제1절. Overall Description ...39
• 1. 특징 ...39
• 2. Summary ...41
• 3. Bonding Diagram ...43
• 4. Pad location & Pin Number ...44
• 5. Laser Fuse ...44
• 가. Laser Marker Location ...45
• 나. Laser Fuse Coordinate Summary ...46
• 다. Laser Fuse Code Summary ...47
• 6. Layout Summary ...48
• 가. Power / Ground Summary ...48
• 나. Circuit Location ...49
• 다. Capacitance & Resistor Location ...50
• 7. Top Level Schematic Summary ...52
• 제2절. Unit Circuit Simulation ...53
• 1. Charger Detector ...53
• 2. N-Depletion Type Reference Voltage Generator ...55
• 3. Voltage Divider ...56
• 4. Oscillator ...57
• 5. Depletion Type Comparator ...58
• 6. Normal Type Comparator ...58
• 7. DO Buffer ...60
• 8. DP Buffer ...60
• 제3절. Full Chip Circuit Simulation ...63
• 1. 0V Charge/Charge Inhibit Function ...63
• 2. Charger Detection ...64
• 3. Over Charge Detection / Release ...65
• 4. Over Current1 ...66
• 5. Over Current2 ...67
• 6. Over Discharge Detect ...68
• 7. Operating Current ...69
• 8. Power Down Current ...70
• 9. Load Short CKT Detect ...71
• 10. Over Discharge Detection Delay Time ...72
• 11. Power UP Condition (0V Charge Enable Case) ...73
• 12. Continuous Mode Simulation ...74
• 제4절. Test Item Definition(D.C) ...75
• 1. Test Flow ...75
• 2. Test Definition ...76
• 3. Pin Open / Short Test ...77
• 4. Vref Measurement Condition ...77
• 5. Fuse Definition ...78
• 6. Overcharge Detection Voltage/Overcharge Release Voltage Level Measure Test ...80
• 7. Overdischarge Detection Voltage / Overdischarge Hysteresis Voltage ...81
• 8. Overcurrent 1 Detection Voltage ...82
• 9. Charger Detection Voltage, Abnormal Charge Current Detection Voltage ...83
• 10. Normal Operation Current Consumption, Power-down Current Consumption ...84
• 11. Internal Resistance Between VM and VDD, Internal Resistance Between VM and VSS ...85
• 12. CO pin H resistance, CO pin L resistenc ...86
• 13. DO Pin H Resistance, DO Pin L Resistance ...87
• 제5절. Test Item Definition(Timing) ...88
• 1. Overcharge Detection Delay Time, Overdischarge Detection Delay Time ...88
• 2. Overcurrent 1 Detection Delay Time, Overcurrent 2 Detection Delay time ...89
• 3. Load Short-Circuiting Detection Delay Time, Abnormal Charge Current Detection Delay Time ...90
• 4. 0 V Battery Charge Inhibition Battery Voltage ...91
• 제4장 연구 개발 결과 (Monitoring IC-Analog Part) ...93
• 제1절. Process별 Model Parameter 검증 ...93
• 1. Samsung 0.25um Process ...93
• 2. Hynix 0.35um Process ...131
• 제2절. Monitoring IC Block Diagram ...144
• 제3절. 각 회로별 동작 및 특성 Simulation ...146
• 1. Top Level Schematic ...146
• 2. Reference Voltage Generator ...147
• 3. Regulator ...152
• 4. Folded Cascode OPAMP (FWCAMP_SOWB) ...157
• 가. Beta-Multiplier ...158
• 나. Cascode Current Mirror ...159
• 5. Oscillator(OSC) ...162
• 6. Temperature Current Sensor ...165
• 가. Selector ...165
• 나. FDDA(Fully Differential Difference Amplifier)...167
• 다. PGA(Programmable Gain Amplifer) ...171
• (1) 3x8 Decoder ...171
• (2) Class-AB Output Buffer ...173
• 라. TC_Sensor TOP_BLOCK ...176
• 7. Voltage Detector ...182
• 8. Temperature Detector ...184
• 9. POR(Power ON Reset) ...187
• 10. ADC ...191
• 제4절. Layout 고찰 ...193
• 1. Total ...193
• 2. Circuit Placement ...194
• 3. Power / GND Routing ...195
• 4. DRC(Design Rule Check) Result Summary ...196
• 5. LVS(Layout Vs. Schematic Result Summary ...206
• 제5장 연구 개발 결과(Monitoring IC Digital 회로 Part) ...216
• 제1절. Battery Monitoring IC Spec. Description ...216
• 1. Product Overview ...216
• 2. Feature ...216
• 3. Pin Description ...217
• 4. Functional Block Diagram ...219
• 5. Architectural Overview ...220
• 가. Internal Voltage Regulator ...220
• 나. Precision Time Base ...220
• 다. Temperature Sensor ...220
• 라. RAM Memory ...220
• 마. A/D Converter ...220
• 바. 16-Bit Accumulator ...220
• 사. I2C Communication Interface ...221
• 6. Operational Description ...221
• 가. Current Measurement ...221
• 나. Current Accumulator ...221
• 다. Current Offset Compensation ...222
• 라. Voltage Measurement ...222
• 마. Temperature Measurement ...222
• 바. EEPROM Register ...222
• 사. Special Feature Register ...223
• 아. Memory Map ...223
• 자. I2C Interface ...224
• 제2절. FPGA에 의한 Design 검증 ...225
• 1. FPGA 검증 Flow ...225
• 2. FPGA Board 사양 ...228
• 3. I2C 통신 프로그램 ...230
• 제3절. ASIC 설계 ...242
• 1. ASIC 설계 Flow ...242
• 2. HDL 설계 Hierarchy ...243
• 3. RTL Codes ...248
• 4. Function Simulation ...324
• 5. 합성 script 및 report file ...350
• 6. ATPG Script 및 Report File ...381
• 7. Pre-layout Simulation ...399
• 8. Place & Route ...431
• 9. Post-layout Simulation ...461
• 10. Physical Verification ...471
• 11. Bonding & Package ...479
• 제6장 결론 ...482
• 개발 기술 정리 ...482
• 활용에 대한 건의 및 기대 효과 ...484
• 상용화 계획 ...485
• 기술개발결과 요약표 ...486
• 수행기관 자체평가의견서 ...487
• 최 종 연 구 결 과 초 록 ...488
• 국문 요약문 ...490
• 성 과 조 사 표(평 가 용) ...491
• 정보통신연구사업성과조사표(기술개발과제용) ...492
• 이전대상기술 요약서 ...500
• 기술개발 성공사례 ...503