초록

Abstract ▼

연구개발 목표 및 내용
최종 목표
To develop large-area MoS2 based ultra-low-power Negative Capacitance Field-Effect Transistor (NCFET) arrays for artificial photo synapse, mimicking the human visual system.
전체 내용
Detailed in the subsequent sections

1단계 (해당 시 작성)
목표
To optimize the

연구개발 목표 및 내용
최종 목표
To develop large-area MoS2 based ultra-low-power Negative Capacitance Field-Effect Transistor (NCFET) arrays for artificial photo synapse, mimicking the human visual system.
전체 내용
Detailed in the subsequent sections

1단계 (해당 시 작성)
목표
To optimize the ferroelectric output of ultra-thin HZO deposited using solution processing. On the other hand, to develop the large area MoS2 via a two-step (deposition-sulfurization) to use the same in NCFETs as a channel layer.
내용
Task (i): The first part of the objective is to develop the ferroelectric-HZO. To accomplish the same, the formulation of homogeneous combustible precursors and their thermal characterization is essential to understand the decomposition reaction pathway. The deposition of the same onto heavily doped silicon and/or patterned ITO (indium-tin-oxide) substrate to be accomplished. The optimization of the deposition and annealing conditions is to be performed to achieve phase pure-orthorhombic HZO with the high remnant polarization. Task (ii): Growth of large-area MoS2 using a two-step method involving (a) molybdenum deposition and (b) sulfurization of molybdenum in the CVD chamber.

2단계 (해당 시 작성)
목표
To Integrate large-area MoS2 with solution-processed ferroelectric HZO to achieve sub-threshold swing lower than 60 mV/dec and hysteresis-free behavior. 내용 Task (iii): Fabrication and characterization of NCFETs using HZO ferroelectric and ALD grew amorphous ultra-thin HfO2 gate stacks. The semiconductors such as mechanically exfoliated MoS2 and CVD-grown MoS2 are to be integrated with the HZO/HfO2 Task (iv): Fabrication of FETs without HZO-ferroelectric for the comparison of performance. Both FETs with/without HZO are to be characterized to understand their respective switching behavior.

3단계 (해당 시 작성)
목표
To develop ultra-low-power NCFET arrays for artificial photo synapse, mimicking the human visual system.
내용
Task (v): Integration of systematically patterned large-area CVD grown MoS2 with HZO/HfO2 to form an array of NCFETs. The array consisting of several NCFETs to be characterized to ensure sub-60 mV/dec-switching of all devices. Task (vi): To utilize the ultra-low operating power of NCFET arrays for photo synaptic behavior, initially, the memory behavior of the arrays is noted, which includes testing of both endurance and retention, along with the cyclic stability of NCFET arrays. Further, the photo-synaptic emulator is to be analyzed in terms of paired-pulse facilitation (PPF), short-term memory (STM) and long-term memory (LTM). The obtained results to be compared with pure FET arrays to establish a firm comparison between the performance parameters of both low-power FET arrays and ultra-low-power NECFET arrays.

연구개발성과
R&D performance can be assessed through the publications and patents I have filed in this work. The publications in journals such as Advanced Functional Materials and two Korean patents have been filed in the concept described above.

연구개발성과 활용계획 및 기대 효과
The plan is successfully executed till now, both, that is the development of device quality high performance ferroelectric of Hafnium Zirconium Oxide thin film using low-cost solution processing is initially optimized. Further, the second major goal of integrating it in to achieve steep switching FETs is also investigated. The static performance characteristic, i.e., subthreshold swing (SS) at room temperature has also been obtained below the limit set of Boltzmann tyranny (i.e., 60 mV/dec). Additional challenge of short channel effect is also addressed. Although the chemical solution deposition has been utilized to deposit various functional metal oxides for semiconducting, conducting, and high permittivity dielectrics applications, its implementation for high performance ferroelectrics has not been fully investigated and understood. In view of this the present work opens totally new avenue for their use in the modern electronics for ultralow voltage operation of FETs. The work would be of greater importance and paves the way for solution processed electronics to the main stream.

(source : 요약문 3p)

목차 Contents

• COVER ... 1
• 요약문 ... 3
• 1. 연구개발과제의 개요 ... 6
• 2. 연구개발과제의 수행 과정 및 수행 내용 ... 7
• 3. 연구개발과제의 수행 결과 및 목표 달성 정도, 연구수행 결과 ... 8
• 4. 연구개발성과의 관련 분야에 대한 기여 정도 ... 9
• 5. 연구개발성과 및 활용 계획 ... 11
• 6. 참고문헌 ... 13
• End of Page ... 13