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최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기정보과학회논문지. Journal of KIISE. 시스템 및 이론, v.27 no.12, 2000년, pp.981 - 987
D. Gajski, N. Dutt, A. Wu, and S. Lin (Eds.) High-level Synthesis - Introduction to Chip and System Design, Kulwer Academic Publishers, 1992
C. Hwang J. Lee, and Y. Hsu, 'A Formal Approach to the Scheduling Problem in High Level Synthesis,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 10. no. 4, pp,464-475, April 1991
M. Balakrishnan and P. Marwedel, 'Integrated Scheduling and Binding: A Synthesis Approach for Design Space Exploration,' Proc. Design Automation Conference, pp. 68-74, 1989
P. Paulin and J. Knight, 'Scheduling and Binding Algorithms for High-Level Synthesis,' Proc. Design Automation Conference, pp. 1-6, 1989
S. Devadas and A. Newton, 'Algorithm for Hardware Allocation in Data Path Synthesis,' IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems. vol. 8, no. 7, pp, 768-781, July, 1989
P. Kollig, B. AI-Hashimi, 'Simultaneous Scheduling, Allocation and Binding in High-level Synthesis,' Electronics Letters, vol. 33, no. 18, August 1997
W, Dougherty and D. Thomas, 'Unifying Behavioral Synthesis and Physical Design,' Proc. of Design Automation Conference, pp. 756-761, 2000
R. Tarjan, Data Structures and Network Algorithms, Society for Industrial and Applied Mathematics, 1983
M. Rim et al. 'Optimal Allocation and Binding in High-Level Synthesis of VLSI Digital Systems,' Tech. Report, Dept. of Electrical and Computer Engineering, University of Wisconsin - Madison, Sept. 1991
F. Tsai and Y. Hsu, 'STAR: An Automatic Data Path Allocator.' IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems, vol. 11. no. 9, pp, 1053-1064, Sept. 1992
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