[논문]Design and Implementation of a Single Input Fuzzy Logic Controller for Boost Converters

Salam, Zainal; Taeed, Fazel; Ayob, Shahrin Md.

doi:10.6113/jpe.2011.11.4.542

Design and Implementation of a Single Input Fuzzy Logic Controller for Boost Converters 원문보기

Journal of power electronics, v.11 no.4, 2011년, pp.542 - 550

Salam, Zainal (Faculty of Electrical Engineering, Universiti Teknologi Malaysia) , Taeed, Fazel (Faculty of Electrical Engineering, Universiti Teknologi Malaysia) , Ayob, Shahrin Md. (Faculty of Electrical Engineering, Universiti Teknologi Malaysia)

Abstract ▼ AI-Helper

This paper describes the design and hardware implementation of a Single Input Fuzzy Logic Controller (SIFLC) to regulate the output voltage of a boost power converter. The proposed controller is derived from the signed distance method, which reduces a multi-input conventional Fuzzy Logic Controller (CFLC) to a single input FLC. This allows the rule table to be approximated to a one-dimensional piecewise linear control surface. A MATLAB simulation demonstrated that the performance of a boost converter is identical when subjected to the SIFLC or a CFLC. However, the SIFLC requires nearly an order of magnitude less time to execute its algorithm. Therefore the former can replace the latter with no significant degradation in performance. To validate the feasibility of the SIFLC, a 50W boost converter prototype is built. The SIFLC algorithm is implemented using an Altera FPGA. It was found that the SIFLC with asymmetrical membership functions exhibits an excellent response to load and input reference changes.

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문제 정의

Unfortunately, its implementation is carried out using an analog technique, forcing it to inherit the disadvantages of an analog system such as noise, reference voltage sensitivity and component aging. In view of these shortcomings, the digital implementation of a SIFLC is preferable, which is why this work is carried out. The focus is on the digital implementation of a SIFLC to regulate a boost converter using a field programming gate array (FPGA).
The method of tuning is to adjust the slope of every section of the PWL function by means of setting the positions of the breakpoints. The objective is to achieve the best compromise in terms of the output voltage overshoot and the steady-state settling time. In positioning the breakpoints, two main criteria are used: (1) a unity slope is considered between the origin and BP1 (2) a lower slope is set between BP1 and BP2 to slow down the effects of the step disturbance.

가설 설정

. When the error signal and its derivative are zero, no changes in the duty cycle are required.
. When the error signal is near the reference point and its derivative has a small positive sign then duty cycle changes are also small.
. When the error signal is too far from the reference point and its derivative has too large a positive sign (in other words the output voltage is smaller than the reference) then duty cycle changes must occur very rapidly with a positive sign, i.e. the duty cycle increases dramatically, forcing an increment of the converter output voltage towards the reference value.

제안 방법

In view of these shortcomings, the digital implementation of a SIFLC is preferable, which is why this work is carried out. The focus is on the digital implementation of a SIFLC to regulate a boost converter using a field programming gate array (FPGA).
This simulation is dedicated to establish the equivalency of the CFLC and SIFLC, i.e. to show that the performances of both controllers are identical. Both symmetrical and asymmetrical cases will be investigated.

이론/모형

To prove its effectiveness, the sIFLC is applied to control a 50W boost converter. The algorithm is implemented using an Altera FPGA. It was found that, in general, the sIFLC exhibits excellent responses to load and input reference changes.

성능/효과

12%. From these observations, it can be concluded that even under very extreme disturbances, the SIFLC appears to be able to match the performance of a CFLC. These results suggest that a CFLC can be replaced with the SIFLC without a significant degradation in control ability.
The superiority of the asymmetrical case observed in the experiment appears to be consistent with simulation results. The apparently better hardware results can be attributed to the fact that during the experiment, the SIFLC parameters are tuned to achieve the best response. On the other hand, for the simulation shown in Section IV, the SIFLC design is not optimized.

참고문헌 (17)

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상세보기
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상세보기
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상세보기
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상세보기
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상세보기
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상세보기
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상세보기
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상세보기
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상세보기
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원문보기 상세보기
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상세보기
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상세보기
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Design and Implementation of a Single Input Fuzzy Logic Controller for Boost Converters 원문보기

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