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참고문헌 (8)

1. Zou, X., Liew, W.-S., Yao, L., Lian Y., "A 1V 22uW 32-Channel Implantable EEG Recording IC," Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International, pp. 126-127, Feb., 2010. 

2. D. Han, Y. Zheng, R. Rajkumar, G. Dawe, M. Je, "A 0.45V 100-Channel Neural-Recording IC with Sub- ${\mu}$ W/Channel Consumption in 0.18 ${\mu}$ m CMOS," Solid-State Circuits Conference, 2013. ISSCC 2013. Digest of Technical Papers. IEEE International,, pp. 290-291, Feb., 2013. 

3. W. S. Liew, X. Zou and Y. Lian, "A 0.5-V 1.13-uW/Channel Neural Recording Interface with Digital Multiplexing Scheme," in Proc. ESSCIRC 2011, pp. 219-222, Sep., 2011. 

4. Tai, H., Hu, Y., Chen, H., and Chen, H. "A 0.85 fJ/conversion-step 10b 200 kS/s subranging SAR ADC in 40 nm CMOS," IEEE ISSCC Dig. Tech. Pap., San Francisco, CA, USA, pp. 196-197, Feb., 2014. 

5. Liew, W.-S., Zou, X., Yao, L., and Lian Y., "A 1-V 60 ${\mu}$ W 16-Channel Interface Chip for Implantable Neural Recording," IEEE Custom Integrated Circuits Conf., San Jose, CA, USA, pp. 507-510, Sep., 2009. 

6. Hariprasath, V., Guerber, J., Lee, S.-H., and Moon, U.-K. "Merged capacitor switching based SAR ADC with highest switching energy efficiency," Electron. Lett., vol.46, no.9, pp.620-621, Apr., 2010. 

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7. Hu, W., Liu, Y.T., Nguyen, T., Lie, D.Y.C., Ginsburg, B.P. "An 8-Bit Single-Ended Ultra-Low-Power SAR ADC With a Novel DAC Switching Method and a Counter-Based Digital Control Circuitry," Circuits and Systems I, IEEE Trans. on, vol.60, no.7, pp. 1726-1739, July, 2013. 

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8. Yip, M., Chandrakasan, A.P. "A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1V Power Scalable SAR ADC for Sensor Applications," IEEE J. Solid State Circuits, vol.48, no.6, pp.1453-1464, June, 2013. 

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