[논문]Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2

Jo, Yoo Jin; Moon, Jeong Hyun; Seok, Ogyun; Bahng, Wook; Park, Tae Joo; Ha, Min-Woo

doi:10.5573/jsts.2017.17.2.265

Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2 원문보기

Journal of semiconductor technology and science, v.17 no.2, 2017년, pp.265 - 270

Jo, Yoo Jin (Department of Advanced Materials Engineering, Hanyang University) , Moon, Jeong Hyun (Power Semiconductor Research Center, High Voltage Direct Current Research Division, Korea Electrotechnology Research Institute) , Seok, Ogyun (Power Semiconductor Research Center, High Voltage Direct Current Research Division, Korea Electrotechnology Research Institute) , Bahng, Wook (Power Semiconductor Research Center, High Voltage Direct Current Research Division, Korea Electrotechnology Research Institute) , Park, Tae Joo (Department of Advanced Materials Engineering, Hanyang University) , Ha, Min-Woo (Department of Electrical Engineering, Myongji University)

Abstract ▼ AI-Helper

4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.

주제어

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문제 정의

The purpose of this work was to report the electrical characteristics of SiO₂/4H-SiC MOS capacitors in which the gate oxide was formed under low-temperature SiO₂ deposition. Using this low-temperature approach, carbon cluster formation was suppressed, without the need for high-temperature post-deposition annealing.

제안 방법

The capacitance–voltage (C–V) characteristics and gate leakage currents of the SiO2/Si MOS capacitors were measured and analyzed, and the flat-band voltage (VFB) and effective oxide charge density (Qeff) values were extracted and compared to theoretical values.

대상 데이터

The C–V characteristics of the devices were measured at 10 kHz, 100 kHz, and 1 MHz, respectively, under the CpRp mode of an Agilent E4980A LCR meter.

성능/효과

The results of this study suggest that low-temperature SiO₂ deposition shows superior 4H-SiC MOS characteristics without post-deposition annealing. The proposed device can suppress carbon clusters without any high-temperature processing.

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