[논문]Bridgeless Buck PFC Rectifier with Improved Power Factor

Malekanehrad, Mahdi; Adib, Ehsan

doi:10.6113/jpe.2018.18.2.323

Bridgeless Buck PFC Rectifier with Improved Power Factor 원문보기

Journal of power electronics, v.18 no.2, 2018년, pp.323 - 331

Malekanehrad, Mahdi (Department of Electrical and Computer Engineering, Isfahan University of Technology) , Adib, Ehsan (Department of Electrical and Computer Engineering, Isfahan University of Technology)

Abstract ▼ AI-Helper

Buck power factor correction (PFC) converters, compared with conventional boost PFC converters, exhibit high efficiency performance in the entire range of universal line voltage. This feature has gotten more attention for eliminating the zero crossing dead angle of buck PFC rectifiers. Furthermore, bridgeless structures for the reduction of conduction losses have been proposed. The aim of this paper is to introduce a single-phase buck rectifier that simultaneously has unity power factor (PF) and bridgeless structure while operating in the continuous conduction mode (CCM). For this purpose, two auxiliary flyback converters without any active switches are applied to a bridgeless buck rectifier to eliminate the zero crossing dead angle and achieve unity power factor, low total harmonic distortion (THD) and high efficiency. The operation and design considerations of the proposed rectifier are verified on a 150W, 48V prototype using a conventional peak-current-mode control. The measurement results show that the proposed rectifier has nearly unity power factor, THD less than 7% and high efficiency.

주제어

표/그림 (11)

그림 Fig. 1. Proposed bridgeless unity power factor buck rectifier.
그림 Fig. 2. Operation of the positive and negative half-line cycles. (a)Positive half-line cycle. (b) Negative half-line cycle.
그림 Fig. 3. Theoretical key waveforms.
그림 Fig. 4. Equivalent circuits of the three modes during the positivehalf-line cycle. (a) Mode 1. (b) Mode 2. (c) Mode 3.
표 TABLE I COMPARISON OF THE PROPOSED RECTIFIER AND THE TOPOLOGIES IN [21]-[25]
그림 Fig. 5. An equivalent circuit of the second mode.
그림 Fig. 6. Schematic of the implemented circuit.
그림 Fig. 7. Measured line waveforms at Po=150 W. (a) Line current and voltage waveforms (time: 5 ms/div). (b) Measured odd harmoniccomponents of the line current with the Class D requirements of JIS C 6100-3-2.
표 TABLE II COMPARISON OF THE PF, THD AND EFFICIENCY OF THE PROPOSED RECTIFIER AND STATE-OF-THE-ART BUCK RECTIFIERS FOR 110 VAC LINE VOLTAGE
그림 Fig. 8. Measured waveforms at Po=150 W. (a) Low frequency voltages (10 V/div; time: 5 ms/div). (b) Switching currents at the peak ofthe line voltage (8 A/div; time: 10 μs/div). (c) Switching voltages at the peak of the line voltage (time: 10 μs/div).
그림 Fig. 9. Measured ef？ciency, PF and THD compared with outputpower.

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이론/모형

Without any auxiliary switches and only with one auxiliary diode, one low voltage small capacitor and an additional winding on the core of the buck inductor, the dead angle of the input current is omitted and a unity PF is achieved. The operation of the proposed rectifier is verified using a 150 W, 48 V experimental prototype operating in the continuous conduction mode (CCM) using peak-current-mode control method.

참고문헌 (25)

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