최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기반도체디스플레이기술학회지 = Journal of the semiconductor & display technology, v.20 no.4, 2021년, pp.171 - 176
장우제 (한국생산기술연구원) , 정용진 (한국생산기술연구원) , 이학준 (한국생산기술연구원)
Die-to-wafer (D2W) hybrid bonding in the multilayer semiconductor manufacturing process is one of wafer direct bonding, and various studies are being conducted around the world. A noteworthy point in the current die-to-wafer process is that a lot of voids occur on the bonding surface of the die duri...
Sungdong Kim & Juhwan Jung. (2018). "Novel Wafer Warpage Measurement Method for 3D Stacked IC", Journal of the Semiconductor & Display Technology, Vol. 17, No.4. (2018)
Lea Di Cioccio, Ionut Radu, Pierric Gueguen, & Mariam Sadaka. (2010). "Direct bonding for wafer level 3D integration", ICICDT-10., 110-113, (2010).
Qin-Yi Tong, Giho Cha, Roman Gafiteanu, & Ulrich Gosele. (1994). "Low Temperature Wafer Direct Bonding", Journal of Microelectromechanical Systems., Vol. 3, No. 1, (1994).
M. Shimbo. K. Furukawa, K. Fukuda, & K. Tanzawa. (1986). "Silicontosilicon direct bonding method", J. Appl. Phys., 60 (8), (1986).
Ran He, Masahisa Fujino, Akira Yamauchi, Yinghui Wang, & Tadatomo Suga. (2016). "Combined Surface Activated Bonding Technique for Low-Temperature Cu/Dielectric Hybrid Bonding", ECS Journal of Solid State Science and Technology., 5 (7) P419-P424, (2016).
Silke H. Christiansen, Rajendra Singh, & Ulrich Gosele. (2006). "Wafer Direct Bonding: From Advanced Substrate Engineering to Future Applications in Micro/Nanoelectronics", Proceedings of the IEEE., Vol. 94, No. 12, (2006).
A. Jouve, V. Balan, N. Bresson, C. Euvrard-Colnat, F. Fournel, Y. Exbrayat, ... , S. Mermoz. (2017). "1㎛ pitch direct hybrid bonding with <300nm Wafer-to-Wafer overlay accuracy", IEEE., (2017).
Stephane Kuhne & Christofer Hierold. (2011). "Wafer-level packaging and direct interconnection technology based on hybrid bonding and through silicon vias", J. Micromech. Microeng., 21, (2011).
Guilian Gao, Laura Mirkarimi, Thomas Workman, Gill Fountain, Jeremy Theil, Gabe Guevara, ... , Michael Huynh. (2019). "Low Temperature Cu Interconnect with Chip to Wafer Hybrid Bonding", 2019 IEEE 69th Electronic Components and Technology Conference (ECTC)., (2019).
Kuan-Neng Chen, Zheng Xu, & Jian-Qiang Lu. (2011). "Demonstration and Electrical Performance Investigation of Wafer-Level Cu Oxide Hybrid Bonding Schemes", IEEE Electron Device letters., Vol. 32, No. 8, (2011)
Hankyeol Seo, Haesung Park, & Sarah Eunkyung Kim. (2020). "Cu-SiO2 Hybrid Bonding", J. Microelectron. Packag. Soc., 27(1), 17-24 (2020).
Young Hak Cho, Sarah Eunkyung Kim & Sungdong Kim. (2013). "Wafer Level Bonding Technology for 3D Stacked IC", Journal of the Microelectronics & Packaging Society., 20(1) 7-13 (2013).
A. Castex, M. Broekaart, F. Rieutord, K. Landry, & C.Lagahe-Blanchard. (2013). "Mechanism of Edge Bonding Void Formation in Hydrophilic Direct Wafer Bonding", ECS Solid State Letters., 2(6) 47-50 (2013).
Hak-Jun Lee, Hyun-Chang Kim, Hyo-Young Kim & Dae-Gab Gweon. (2013). "Optimal design and experiment of a three-axis out-of-plane nano positioning stage using a new compact bridge-type displacement amplifier", AIP Review of Scientific Instruments., 84,115103 (2013).
Ngoc-Thai Huynh, Shyh-Chour Huang & Thanh-Phong Dao. (2018). "Optimal displacement amplification ratio of bridge -type compliant mechanism flexure hinge using the Taguchi method with grey relational analysis", Springer-Verlag GmbH Germany, part of Springer Nature (2018).
*원문 PDF 파일 및 링크정보가 존재하지 않을 경우 KISTI DDS 시스템에서 제공하는 원문복사서비스를 사용할 수 있습니다.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.