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NTIS 바로가기Microprocessing and microprogramming, v.40 no.7, 1994년, pp.499 - 520
Sarkar, S. (Computer Science & Engineering Dept., Indian Institute of Technology, 721 302,, Kharagpur, India) , Majumdar, A.K. , Sen, R.K.
The Instruction Systolic Array (ISA) and the Tagged Systolic Array (TSA) are enhanced systolic architectures which have been used to implement some graph theoretic algorithms in this paper. Designs for testing a graph for connectedness, finding all paths from vertices to the root of a spanning tree,...
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