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NTIS 바로가기IEEE journal of solid-state circuits, v.41 no.5, 2006년, pp.1081 - 1091
Ju-Ho Sohn (Dept. of Electr. Eng.&Comput. Sci., Korea Adv. Inst. of Sci.&Technol., Daejeon, South Korea) , Jeong-Ho Woo (Dept. of Electr. Eng.&Comput. Sci., Korea Adv. Inst. of Sci.&Technol., Daejeon, South Korea) , Min-Wuk Lee , Hye-Jung Kim , Woo, R. , Hoi-Jun Yoo
A 36 mm2 graphics processor with fixed-point programmable vertex shader is designed and implemented for portable two-dimensional (2-D) and three-dimensional (3-D) graphics applications. The graphics processor contains an ARM-10 compatible 32-bit RISC processor,a 128-bit programmable fixed-point sing...
Woo, Ramchan, Choi, Sungdae, Sohn, Ju-Ho, Song, Seong-Jun, Yoo, Hoi-Jun. A 210-mW graphics LSI implementing full 3-D pipeline with 264 mtexels/s texturing for mobile multimedia applications. IEEE journal of solid-state circuits, vol.39, no.2, 358-367.
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Proc HotChips 10 sa1500: a300 mhz risc cpu with attached media processor gandhi 1998
Suzuoki, M., Kutaragi, K., Hiroi, T., Magoshi, H., Okamoto, S., Oka, M., Ohba, A., Yamamoto, Y., Furuhashi, M., Tanaka, M., Yutaka, T., Okada, T., Nagamatsu, M., Urakawa, Y., Funyu, M., Kunimatsu, A., Goto, H., Hashimoto, K., Ide, N., Murakami, H., Ohtaguro, Y., Aono, A.. A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder. IEEE journal of solid-state circuits, vol.34, no.11, 1608-1618.
Game Developers Conf 3-d graphics optimization for arm architecture kolli 2002
Woo, Ramchan, Yoon, Chi-Weon, Kook, Jeonghoon, Lee, Se-Joong, Yoo, Hoi-Jun. A 120-mW 3-D rendering engine with 6-Mb embedded DRAM and 3.2-GB/s runtime reconfigurable bus for PDA chip. IEEE journal of solid-state circuits, vol.37, no.10, 1352-1355.
Woo, Ramchan, Choi, Sungdae, Sohn, Ju-Ho, Song, Seong-Jun, Yoo, Hoi-Jun. A 210-mW graphics LSI implementing full 3-D pipeline with 264 mtexels/s texturing for mobile multimedia applications. IEEE journal of solid-state circuits, vol.39, no.2, 358-367.
Clark, D.. Mobile processors begin to grow up. Computer, vol.35, no.3, 22-25.
Proc Siggraph/Eurographics Workshop on Graphics Hardware 3-d lsi core for mobile phonez3d kameyama 2003 60
Hashimoto, T., Ohashi, M., Matsuo, M., Kuromaru, S., Mori-iwa, T., Hamada, M., Sugisawa, Y., Tomita, H., Hoshino, M., Nakamura, T., Ishida, K., Watada, K., Fukunaga, T., Michiyama, J.. A 27-MHz/54-MHz 11-mW MPEG-4 video decoder LSI for mobile applications. IEEE journal of solid-state circuits, vol.37, no.11, 1574-1581.
Akenine-Möller, Tomas, Ström, Jacob. Graphics for the masses : a hardware rasterization architecture for mobile phones. ACM transactions on graphics, vol.22, no.3, 801-808.
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