참고문헌 (21)

1. IEEE Communication Magazine J Kim 48 3 156 2010 10.1109/MCOM.2010.5434388 Kim, J., Hyeon, S., & Choi, S. (2010). Implementation of an SDR system using graphics processing unit. IEEE Communication Magazine, 48(3), 156-162. 

   상세보기

2. Jorgensen, P. B., Hansen, T. L., Sorensen, T. B., & Berardinelli, G. (2011). Implementation of LTE SC-FDMA on the USRP2 software defined radio platform, IEEE Swedish Communication Technologies Workshop, (pp. 34-39). 

3. NVIDIA Corporation (2009).NVIDIA CUDA programming guide. 

4. Ettus Research. Change log for releases. http://ettus-apps.sourcerepo.com/redmine/ettus/projects/uhd/wiki/ChangeLog . 

5. 3GPP (2012). 3rd generation partnership project (3GPP); Technical specification group radio access network; evolved universal terrestrial radio access (E-UTRA); physical channels and modulation (Release 9), http://3gpp.org/ftp/specs/html-info/36211.htm . 

6. 3GPP (2012). 3rd generation partnership project (3GPP); Technical specification group radio access network; evolved universal terrestrial radio access (E-UTRA); Multiplexing and channel coding (Release 9), http://3gpp.org/ftp/specs/html-info/36212.htm . 

7. NVIDIA Corporation (2011). NVIDIA GTX 295 Datasheet, NVIDIA Corporation. http://www.nvidia.com/object/product_geforce_gtx_295_us.html . 

8. Journal of Parallel and distributed Computing S Che 68 10 1370 2008 10.1016/j.jpdc.2008.05.014 Che, S., Boyer, M., Meng, J., Tarjan, D., Sheaffer, J. W., & Skadron, K. (2008). A performance study of general-purpose application on graphics processors using CUDA. Journal of Parallel and distributed Computing, 68(10), 1370-1380. 

   상세보기

9. Parallel Processing Letters D Merrill 21 245 2011 10.1142/S0129626411000187 Merrill, D., & Grimshaw, A. (2011). High performance and scalable radix sorting: A case of implementing dynamic parallelism for GPU computing. Parallel Processing Letters, 21, 245-272. 

   상세보기

10. Analog Integrated Circuit and Signal Processing C Ahn 73 2 569 2012 10.1007/s10470-012-9941-5 Ahn, C., Bang, S., Kim, H., Lee, S., Kim, J., Choi, C., et al. (2012). Implementation of an SDR system using an MPI-based GPU cluster for WiMAX and LTE. Analog Integrated Circuit and Signal Processing, 73(2), 569-582. 

    상세보기

11. Analog Integrated Circuit and Signal Processing C Ahn 69 2-3 107 2011 10.1007/s10470-011-9764-9 Ahn, C., Kim, J., Ju, J., Choi, J., Choi, B., & Choi, S. (2011). Implementation of an SDR platform using GPU and its application to a 2x2 MIMO WiMAX system. Analog Integrated Circuit and Signal Processing, 69(2-3), 107-117. 

    

12. 10.1145/1345206.1345220 Ryoo, S., Rodrigues, C. I., Baghsorkhi, S. S., Stone, S. S., Kirk, D. B., & Hwu, W. W. (2008). Optimization principles and application performance evaluation of a multithreaded GPU using CUDA. Proceedings of the 13th ACM SIGPLAN Symposium on principles and practice of parallel programming, (pp. 73-82). 

    

13. 10.1109/SASP.2009.5226334 Moazeni, M., Bui, A., & Sarrafzadeh, M. (2009). A memory optimization technique for software-managed scratchpad memory in GPUs. IEEE 7th Symposium on Application Specific Processors, (pp. 43-49). 

    

14. NVIDIA Corporation (2009). NVIDIA CUDA Compute unified device architecture: Programming guide (Version 2.3). 

15. IEEE International Conference on Communications C Berrou 2 1064 1993 10.1109/ICC.1993.397441 Berrou, C., Glavieux, A., & Thitimajshima, P. (1993). Near Shannon limit error-correcting coding and decoding: Turbo-codes. 1. IEEE International Conference on Communications, 2, 1064-1070. 

    

16. IEEE Journal of Solid-State Circuits C Studer 46 1 8 2011 10.1109/JSSC.2010.2075390 Studer, C., Benkeser, C., Belfanti, S., & Huang, Q. (2011). Design and implementation of a parallel turbo-decoder ASIC for 3GPP LTE. IEEE Journal of Solid-State Circuits, 46(1), 8-17. 

    상세보기

17. IEEE Transactions on Consumer Electronics SM Karim 56 2 450 2010 10.1109/TCE.2010.5505954 Karim, S. M., & Chakrabarti, I. (2010). An improved low-power high-throughput log-MAP turbo decoder. IEEE Transactions on Consumer Electronics, 56(2), 450-457. 

    상세보기

18. IEEE International Symposium on Circuits and Systems JM Hsu 4 445 1998 Hsu, J. M., & Wang, C. L. (1998). A parallel decoding scheme for turbo codes. IEEE International Symposium on Circuits and Systems, 4, 445-448. 

19. Journal of Signal Processing Systems M Wu 65 2 171 2011 10.1007/s11265-011-0617-7 Wu, M., Sun, Y., Wang, G., & Cavallaro, J. R. (2011). Implementation of a high throughput 3GPP turbo decoder on GPU. Journal of Signal Processing Systems, 65(2), 171-183. 

    상세보기

20. Integration, the VLSI Journal Y Sun 44 305 2011 10.1016/j.vlsi.2010.07.001 Sun, Y., & Cavallaro, J. R. (2011). Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder. Integration, the VLSI Journal, 44, 305-315. 

    상세보기

21. IEEE Communication Letters S Yun 6 7 288 2002 10.1109/LCOMM.2002.801310 Yun, S., & Bar-Ness, Y. (2002). A parallel MAP algorithm for low latency turbo decoding. IEEE Communication Letters, 6(7), 288-290. 

    상세보기

활용도 Top5 논문

더보기

해당 논문의 주제분야에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.