Kim, Jonghoon J.
,
Heegon Kim
,
Jung, Daniel H.
,
Sumin Choi
,
Jaemin Lim
,
Youngwoo Kim
,
Junyong Park
,
Hyesoo Kim
,
Dongho Ha
,
Bae, Michael
,
Joungho Kim
As the data rate of Low Power Double Data Rate 4 (LPDDR4) memory now exceeds 3.2 Gb/s, it is becoming more difficult to meet the target specifications. While testing has become of utmost importance, it is not viable to have a direct access to the signal pins in a package on package configuration due...
As the data rate of Low Power Double Data Rate 4 (LPDDR4) memory now exceeds 3.2 Gb/s, it is becoming more difficult to meet the target specifications. While testing has become of utmost importance, it is not viable to have a direct access to the signal pins in a package on package configuration due to the densely located array of solder balls; instead, a test interposer with an excellent electrical performance needs to be adopted to provide test access. In this paper, we first propose a novel test interposer scheme for testing LPDDR4 memory packages. For accurate testing without significant influence on the intrinsic signal path, the proposed test interposer is designed considering a number of signal integrity issues such as intersymbol interference, jitter, impedance matching, and crosstalk. Furthermore, by adopting silicone rubber sheet in place of soldering, the proposed test interposer enhances reusability of the packages with a fast setup time. Moreover, a reconstruction method is proposed that can reconstruct the voltage at application processor using the waveform captured on the test interposer, instead of probing at the ball gray array directly. Through a series of simulations and measurements, we experimentally verified the proposed test interposer. The proposed test interposer scheme can be widely adopted for testing of high-performance packages with its high accuracy and practicality.
As the data rate of Low Power Double Data Rate 4 (LPDDR4) memory now exceeds 3.2 Gb/s, it is becoming more difficult to meet the target specifications. While testing has become of utmost importance, it is not viable to have a direct access to the signal pins in a package on package configuration due to the densely located array of solder balls; instead, a test interposer with an excellent electrical performance needs to be adopted to provide test access. In this paper, we first propose a novel test interposer scheme for testing LPDDR4 memory packages. For accurate testing without significant influence on the intrinsic signal path, the proposed test interposer is designed considering a number of signal integrity issues such as intersymbol interference, jitter, impedance matching, and crosstalk. Furthermore, by adopting silicone rubber sheet in place of soldering, the proposed test interposer enhances reusability of the packages with a fast setup time. Moreover, a reconstruction method is proposed that can reconstruct the voltage at application processor using the waveform captured on the test interposer, instead of probing at the ball gray array directly. Through a series of simulations and measurements, we experimentally verified the proposed test interposer. The proposed test interposer scheme can be widely adopted for testing of high-performance packages with its high accuracy and practicality.
참고문헌 (17)
LPDDR4 EdgeProbe Component Interposers 2014
10.1109/SMELEC.2008.4770348
10.1109/EPTC.2015.7412426
10.1109/EDAPS.2015.7383666
IEEE Trans Compon Packag Manuf Technol Improved target impedance for power distribution network design with power traces based on rigorous transient analysis in a handheld device kim 2013 10.1109/TCPMT.2012.2232353 3 1554
Proc Electr Des Adv Packag Syst Symp Chip-package-board co-design—A DDR3 system design example from circuit designers’ perspective lin 0 27
Proc IEEE Electrical Performance Electronic Packag Design and characterization of a 12.8 GB/s low power differential memory system for mobile applications oh 0 33
10.1109/EDAPS.2010.5683010
10.1109/EMCEUROPE.2008.4786874
Jongbae Park, Hyungsoo Kim, Youchul Jeong, Jingook Kim, Jun So Pak, Dong Gun Kam, Joungho Kim.
Modeling and measurement of simultaneous switching noise coupling through signal via transition.
IEEE transactions on advanced packaging : a publication of the IEEE Components, Packaging, and Manufacturing Technology Society and the Lasers and Electro Optics Society,
vol.29,
no.3,
548-559.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.