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LDD CMOS process 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/265
출원번호 US-0071002 (1987-07-09)
발명자 / 주소
  • Parrillo Louis C. (Austin TX) Poon Stephen S. (Austin TX)
출원인 / 주소
  • Motorola, Inc. (Schaumburg IL 02)
인용정보 피인용 횟수 : 182  인용 특허 : 0

초록 ▼

A process is disclosed for fabricating LDD CMOS structures having a reduced mask count and improved manufacturability. In one embodiment of the invention a CMOS structure is formed having gate insulators overlying N and P type surface regions. Gate electrodes are formed on each of the surface region

대표청구항 ▼

A process for fabricating a CMOS device comprising the sequential steps of: providing a silicon substrate including surface regions of first and second conductivity type; forming an insulator overlying said surface regions; forming first and second gate electrodes insulatively spaced from said surfa

이 특허를 인용한 특허 (182)

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