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Barrier process for Ta2O5 capacitor 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/70
출원번호 US-0193678 (1994-02-08)
발명자 / 주소
  • Mathews Viju K. (Boise ID)
출원인 / 주소
  • Micron Semiconductor, Inc. (Boise ID 02)
인용정보 피인용 횟수 : 69  인용 특허 : 0

초록

The method of the present invention introduces a fabrication method for forming a storage capacitor on a supporting silicon substrate of a semiconductor device, by the steps of: forming a bottom capacitor electrode comprising conductively doped polysilicon; forming an insulating layer over the botto

대표청구항

A method for forming an reaction prevention barrier between a first conductive layer and a tantalum oxide layer on a supporting substrate of a semiconductor device, said method comprising the steps of: forming said tantalum oxide layer; forming a semiconductive layer over said tantalum oxide layer;

이 특허를 인용한 특허 (69)

  1. DeBoer,Scott Jeffrey; Al Shareef,Husam N.; Thakur,Randhir P. S.; Gealy,Dan, Antifuse having tantalum oxynitride film and method for making same.
  2. Al-Shareef Husam N. ; DeBoer Scott J. ; Gealy Dan ; Thakur Randhir P. S., Boride electrodes and barriers for cell dielectrics.
  3. Al-Shareef Husam N. ; DeBoer Scott J. ; Gealy Dan ; Thakur Randhir P. S., Boride electrodes and barriers for cell dielectrics.
  4. Al-Shareef, Husam N.; DeBoer, Scott J.; Gealy, Dan; Thakur, Randhir P. S., Boride electrodes and barriers for cell dielectrics.
  5. Kwang Chul Joo KR; Kee Jeung Lee KR; Il Keoun Han KR, Capacitor for semiconductor memory device and method of manufacturing the same.
  6. DeBoer, Scott Jeffrey; Al-Shareef, Husam N.; Thakur, Randhir P. S.; Gealy, Dan, Capacitor having tantalum oxynitride film and method for making same.
  7. DeBoer,Scott Jeffrey; Al Shareef,Husam N.; Thakur,Randhir P. S.; Gealy,Dan, Capacitor having tantalum oxynitride film and method for making same.
  8. Scott Jeffrey DeBoer ; Husam N. Al-Shareef ; Randhir P. S. Thakur ; Dan Gealy, Capacitor having tantalum oxynitride film and method for making same.
  9. Agarwal,Vishnu K., Capacitor including a percentage of amorphous dielectric material and a percentage of crystalline dielectric material.
  10. Husam N. Al-Shareef ; Scott Jeffrey DeBoer ; F. Daniel Gealy ; Randhir P. S. Thakur, Capacitor with conductively doped Si-Ge alloy electrode.
  11. Agarwal, Vishnu K.; Derderian, Garo J., Capacitor with discrete dielectric material.
  12. Randhir P. S. Thakur ; Garry A. Mercaldi ; Michael Nuttall, Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer.
  13. Randhir P. S. Thakur ; Garry A. Mercaldi ; Michael Nuttall, Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer.
  14. Thakur Randhir P. S. ; Mercaldi Garry A. ; Nuttall Michael, Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer.
  15. Thakur, Randhir P. S.; Mercaldi, Garry A.; Nuttall, Michael, Capacitor/antifuse structure having a barrier-layer electrode and improved barrier layer.
  16. Agarwal, Vishnu K.; Derderian, Garo J., Capacitors and methods of forming capacitors.
  17. Al-Shareef Husam N. ; DeBoer Scott Jeffery ; Thakur Randhir P. S., Capacitors, methods of forming capacitors and integrated circuitry.
  18. Al-Shareef Husam N. ; DeBoer Scott Jeffrey ; Gealy F. Daniel ; Thakur Randhir P. S., Capacitors, methods of forming capacitors, and DRAM memory cells.
  19. DeBoer, Scott J.; Al-Shareef, Husam; Thakur, Randhir, DRAM capacitor formulation using a double-sided electrode.
  20. DeBoer, Scott J.; Al-Shareef, Husam; Thakur, Randhir, DRAM capacitor formulation using a double-sided electrode.
  21. Scott J. DeBoer ; Husam Al-Shareef ; Randhir Thakur, DRAM capacitor formulation using a double-sided electrode.
  22. Vaartstra, Brian A.; Marsh, Eugene P., Device structures including ruthenium silicide diffusion barrier layers.
  23. Marsh Eugene P., Diffusion barrier layers and methods of forming same.
  24. Agarwal Vishnu K., Electrode and capacitor structure for a semiconductor device and associated methods of manufacture.
  25. Bronner Gary Bela ; Cohen Stephan Alan ; Dobuzinsky David Mark ; Gambino Jeffrey Peter ; Ho Herbert Lei ; Madden Karen Popek, High dielectric TiO.sub.2 -SiN composite films for memory applications.
  26. Bronner Gary Bela ; Cohen Stephan Alan ; Dobuzinsky David Mark ; Gambino Jeffrey Peter ; Ho Herbert Lei ; Madden Karen Popek, High dielectric TiO.sub.2 -SiN composite films for memory applications.
  27. Lu, Jiong-Ping; Hwang, Ming-Jang, High-K dielectric materials and processes for manufacturing them.
  28. Lu, Jiong-Ping; Hwang, Ming-Jang, High-K dielectric materials and processes for manufacturing them.
  29. Jiong-Ping Lu ; Ming-Jang Hwang, High-k dielectric materials and processes for manufacturing them.
  30. Lu, Jiong Ping; Hwang, Ming Jang, High-k dielectric materials and processes for manufacturing them.
  31. Lu, Jiong-Ping; Hwang, Ming-Jang, High-k dielectric materials and processes for manufacturing them.
  32. Lee, Seung-Hwan; Lee, Sang-Hyeop; Kim, Young-Sun; Shim, Se-Jin; Jin, You-Chan; Moon, Ju-Tae; Choi, Jin-Seok; Kim, Young-Min; Kim, Kyung-Hoon; Nam, Kab-Jin; Park, Young-Wook; Won, Seok-Jun; Kim, Young, Integrated circuit capacitors having doped HSG electrodes.
  33. Agarwal Vishnu K. ; Derderian Garo J., Integrated circuitry and method of restricting diffusion from one material to another.
  34. Vishnu K. Agarwal ; Garo J. Derderian, Integrated circuitry and method of restricting diffusion from one material to another.
  35. Agarwal,Vishnu K., Integrated circuitry including a capacitor with an amorphous and a crystalline high K capacitor dielectric region.
  36. Christine Dehm DE; Carlos Mazure-Espejo DE, Layer configuration with a material layer and a diffusion barrier which blocks diffusing material components and process for producing a diffusion barrier.
  37. Yang, Sam, Low leakage MIM capacitor.
  38. Yang,Sam, Low leakage MIM capacitor.
  39. Yang,Sam, Low leakage MIM capacitor.
  40. Yang,Sam, Low leakage MIM capacitor.
  41. Kaushik Vidya S. ; Tseng Hsing-Huang, Method for forming a reverse dielectric stack.
  42. Hwang Ki-hyun,KRX ; Park Jae-young,KRX ; Byun Jae-ho,KRX, Method for forming a tantalum oxide capacitor using two-step rapid thermal nitridation.
  43. Shue Shaulin (Hsinchu TWX), Method of CVD TiN barrier layer integration.
  44. Lim Chan,KRX, Method of forming a capacitor of a semiconductor device.
  45. Vaartstra,Brian A.; Westmoreland,Donald L., Method of forming barrier layers.
  46. Lu, Jiong-Ping; Hwang, Ming-Jang, Method of forming capacitors.
  47. DeBoer Scott Jeffrey ; Gealy F. Daniel ; Thakur Randhir P. S., Method of forming capacitors containing tantalum.
  48. DeBoer, Scott Jeffrey; Gealy, F. Daniel; Thakur, Randhir P. S., Method of forming capacitors containing tantalum.
  49. Al-Shareef Husam N. ; DeBoer Scott Jeffrey ; Thakur Randhir P. S., Method of forming capacitors having high-K oxygen containing capacitor dielectric layers, method of processing high-K oxygen containing dielectric layers, method of forming a DRAM cell having having .
  50. Agarwal Vishnu K. ; Derderian Garo J. ; Sandhu Gurtej S., Method of forming capacitors, method of processing dielectric layers, method of forming a DRAM cell.
  51. Thakur, Randhir P. S.; Mercaldi, Garry A.; Nuttall, Michael; Chen, Shenline; Ping, Er Xuan, Methods for enhancing capacitors having roughened features to increase charge-storage capacity.
  52. Thakur, Randhir P. S.; Mercaldi, Garry A.; Nuttall, Michael; Chen, Shenline; Ping, Er-Xuan, Methods for enhancing capacitors having roughened features to increase charge-storage capacity.
  53. Thakur,Randhir P. S.; Mercaldi,Garry A.; Nuttall,Michael; Chen,Shenlin; Ping,Er Xuan, Methods for enhancing capacitors having roughened features to increase charge-storage capacity.
  54. Thakur,Randhir P. S.; Mercaldi,Garry A.; Nuttall,Michael; Chen,Shenlin; Ping,Er Xuan, Methods for enhancing capacitors having roughened features to increase charge-storage capacity.
  55. Hyun-bo Shin KR; Myeong-cheol Kim KR; Jin-won Kim KR; Ki-hyun Hwang KR; Jae-young Park KR; Bon-young Koo KR, Methods of forming HSG capacitors from nonuniformly doped amorphous silicon layers and HSG capacitors formed thereby.
  56. Agarwal, Vishnu K., Methods of forming a capacitor with an amorphous and a crystalline high K capacitor dielectric region.
  57. Al-Shareef, Husam N.; DeBoer, Scott Jeffrey; Gealy, F. Daniel; Thakur, Randhir P. S., Methods of forming capacitors.
  58. Lee, Seung-Hwan; Lee, Sang-Hyeop; Kim, Young-Sun; Shim, Se-Jin; Jin, You-Chan; Moon, Ju-Tae; Choi, Jin-Seok; Kim, Young-Min; Kim, Kyung-Hoon; Nam, Kab-Jin; Park, Young-Wook; Won, Seok-Jun; Kim, Young, Methods of forming integrated circuit capacitors having doped HSG electrodes.
  59. Lee Seung-Hwan,KRX ; Lee Sang-Hyeop,KRX ; Kim Young-Sun,KRX ; Shim Se-Jin,KRX ; Jin You-Chan,KRX ; Moon Ju-Tae,KRX ; Choi Jin-Seok,KRX ; Kim Young-Min,KRX ; Kim Kyung-Hoon,KRX ; Nam Kab-Jin,KRX ; Par, Methods of forming integrated circuit capacitors having improved electrode and dielectric layer characteristics and capacitors formed thereby.
  60. Yu Young-Sub,KRX ; Shin Hyun-Bo,KRX, Methods of forming integrated circuit capacitors having protected layers of HSG silicon therein.
  61. Al-Shareef Husam N. ; DeBoer Scott Jeffery ; Thakur Randhir P. S., Methods of forming integrated circuitry and capacitors having a capacitor electrode having a base and a pair of walls projecting upwardly therefrom.
  62. Seung-hwan Lee KR; Ki-yeon Park KR; Jae-soon Lim KR, Methods of manufacturing integrated circuit capacitors having hemispherical grain electrodes.
  63. Brian A. Vaartstra ; Donald L. Westmoreland, Mixed metal nitride and boride barrier layers.
  64. Vaartstra, Brian A.; Westmoreland, Donald L., Mixed metal nitride and boride barrier layers.
  65. Vaartstra Brian A. ; Marsh Eugene P., Ruthenium silicide diffusion barrier layers and methods of forming same.
  66. Vaartstra, Brian A.; Marsh, Eugene P., Ruthenium silicide diffusion barrier layers and methods of forming same.
  67. DeBoer Scott Jeffrey ; Gealy F. Daniel ; Thakur Randhir P. S., Semiconductor circuit components and capacitors.
  68. Agarwal,Vishnu K.; Derderian,Garo J., Semiconductor constructions having crystalline dielectric layers.
  69. Agarwal,Vishnu K.; Derderian,Garo J., Semiconductor devices.

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