[특허]Hexagonal DRAM array

Hexagonal DRAM array 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-029/78 H01L-029/41
출원번호	US-0517153 (1995-08-21)
발명자 / 주소	Rostoker Michael D. Koford James S. Scepanovic Ranko Jones Edwin R. Padmanahben Gobi R. Kapoor Ashok K. Kudryavtsev Valeriy B.,RUX Andreev Alexander E.,RUX Aleshin Stanislav V.,RUX
출원인 / 주소	LSI Logic Corporation
대리인 / 주소	Mitchell, Silberberg & Knupp LLP
인용정보	피인용 횟수 : 109 인용 특허 : 0

초록 ▼

Several inventions are disclosed. A cell architecture using hexagonal shaped cells is disclosed. The architecture is not limited to hexagonal shaped cells. Cells may be defined by clusters of two or more hexagons, by triangles, by parallelograms, and by other polygons enabling a variety of cell shapes to be accommodated. Polydirectional non-orthogonal three layer metal routing is disclosed. The architecture may be combined with the tri-directional routing for a particularly advantageous design. In the tri-directional routing arraingement, electrical conductors for interconnecting terminals of microelectronic cells of an integrated circuit preferrably extend in three directions that are angularly displaced from each other by 60.degree.. The conductors that extend in the three directions are preferrably formed in three different layers. A method of minimizing wire length in a semiconductor device is disclosed. A method of minimizing intermetal capacitance in a semiconductor device is disclosed. A novel device called a "tri-ister" is disclosed. Triangular devices are disclosed, including triangular NAND gates, triangular AND gates, and triangular OR gates. A triangular op amp and triode are disclosed. A triangular sense amplifier is disclosed. A DRAM memory array and an SRAM memory array, based upon triangular or parallelogram shaped cells, are disclosed, including a method of interconnecting such arrays. A programmable variable drive transistor is disclosed. CAD algorithms and methods are disclosed for designing and making semiconductor devices, which are particularly applicable to the disclosed architecture and tri-directional three metal layer routing.

대표청구항 ▼

[ What is claimed is:] [1.] A DRAM cell, comprising:a triangular semiconductor structure formed on a semiconductor substrate having a first transistor, a second transistor, and a third transistor;the first transistor having a gate electrode connected to a drain of the second transistor, the gate electrode of the first transistor comprising a layer of doped polysilicon forming a Y-shaped capacitor for storage;the second transistor having a source connected to a write bit line, the second transistor having a gate electrode connected to a write select line;the third transistor having a gate electrode connected to a read select line, the third transistor having a drain connected to a read bit line; and,the first transistor and the third transistor having a common source-drain.

이 특허를 인용한 특허 (109)

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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

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연합인증

Hexagonal DRAM array 원문보기

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Hexagonal DRAM array 원문보기

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