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Inverting charge pump 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H02M-003/18
출원번호 US-0211587 (1998-12-14)
발명자 / 주소
  • Forbes Andrew Bruce
  • Imbornone James Francis
  • Pavio Raymond Thomas
출원인 / 주소
  • The Whitaker Corporation
인용정보 피인용 횟수 : 26  인용 특허 : 13

초록

This invention provides a voltage inverting charge pump 20. The charge pump 20 produces an output at node 60 which is twice the magnitude of the inverse of the input voltage applied to node 50. A first set of switches 22, 24, 26, 28 are connected to the pair of pump capacitors 36, 38 and a voltage s

대표청구항

[ We claim:] [1.] A voltage inverting charge pump comprising:a pair of pump capacitors;a hold capacitor;a first group of switches connected to an input terminal, a reference terminal, and both pump capacitors such that the pump capacitors are connected in parallel with each other between the input t

이 특허에 인용된 특허 (13)

  1. Montalvo Antonio J. (850 Cole St. San Francisco CA 94117), Back-to-back capacitor charge pumps.
  2. Price Colin C. (Newbury GB2), Bipolar voltage doubler circuit.
  3. Caliboso Amado A. (Sunnyvale CA) Tasdighi Ali (San Jose CA) Tero John P. (Saratoga CA), Charge pump circuit having independent inverted and non-inverted terminals.
  4. Imi Toshiro (Kawasaki JPX), Charge pump voltage converter.
  5. Lee Thomas H. (Cupertino CA), Differential charge pump circuit with high differential and low common mode impedance.
  6. Connell Lawrence E. (Naperville IL) Keller Anthony F. (Chicago IL), High efficiency compact low power voltage doubler circuit.
  7. Bingham David (San Jose CA) Allen Charles M. (Sunnyvale CA), Integrated dual charge pump power supply and RS-232 transmitter/receiver.
  8. Bingham David (San Jose CA) Allen Charles M. (Sunnyvale CA), Integrated dual charge pump power supply and RS-232 transmitter/receiver.
  9. Ellis Denis (Dooradoyle IEX), Multiplying and inverting charge pump.
  10. Manning Troy (Boise ID), System powered with inter-coupled charge pumps.
  11. Manning Troy A. (Boise ID), System powered with inter-coupled charge pumps.
  12. Tamagawa Akio (Tokyo JPX), Voltage converting circuit and multiphase clock generating circuit used for driving the same.
  13. Floyd Michael D. (Austin TX) Stump Jeffrey D. (Elgin TX), Voltage multiplying and inverting charge pump.

이 특허를 인용한 특허 (26)

  1. Hashimoto,Fuminori, Amplifier for amplifying input signal such as video signal and outputting amplified signal.
  2. Hashimoto,Fuminori, Charge pump circuit.
  3. Hashimoto,Fuminori, Charge pump circuit and amplifier.
  4. Ayel, François, Charge pump circuit for generating a negative voltage.
  5. Yen,Chih Jen, Charge pump for generating arbitrary voltage levels.
  6. Low, Aichen; Szczeszynski, Gregory; Giuliano, David, Charge pump stability control.
  7. Low, Aichen; Szczeszynski, Gregory; Giuliano, David, Charge pump stability control.
  8. Muramatsu,Yasunori; Tateishi,Tetsuo, Charge pump type DC/DC converter having stepwise adjustable output voltage.
  9. Rader, William E.; Keesor, David P., Charge pump with current limiting circuit.
  10. Rader, William E.; Keesor, David P., Charge pump with current limiting circuit.
  11. Nonaka, Yoshihiro, Charge pump-type booster circuit.
  12. Takao Myono JP, Charge-pump circuit and control method thereof.
  13. Oyama,Manabu; Uchimoto,Daisuke, Charge-pump type switching power supply apparatus.
  14. St. Pierre Robert, Current mode charge pumps.
  15. Imbornone, James F.; Mourant, Jean-Marc, Image trap filter.
  16. Erickson, John H.; McCormick, Robert L.; Tranchina, Benjamin A., Method for providing multiple voltage levels during pulse generation and implantable pulse generating employing the same.
  17. Varrichio,Anthony J.; Tranchina,Benjamin A., Method of efficiently performing fractional voltage conversion and system comprising efficient fractional voltage converter circuitry.
  18. Fifield, John A.; Hunter, Bradford; Rasmus, Todd M.; Sorna, Michael A.; Storaksa, Daniel W., Regulated voltage boost charge pump for an integrated circuit device.
  19. Draxelmayr, Dieter, Sample-and-hold device and method for the operation of a sample-and-hold device.
  20. McIntyre, William James; Kotowski, Jeffrey P.; Guenot, Stephane, Switched capacitor array circuits having universal rest state and method.
  21. Caplan, Randy J.; Schwake, Steven J., Systems and methods for minimizing static leakage of an integrated circuit.
  22. Caplan, Randy J.; Schwake, Steven J., Systems and methods for minimizing static leakage of an integrated circuit.
  23. Caplan, Randy J.; Schwake, Steven J., Systems and methods for minimizing static leakage of an integrated circuit.
  24. Caplan,Randy J.; Schwake,Steven J., Systems and methods for minimizing static leakage of an integrated circuit.
  25. Lee,Seung Hoon; Sim,Jae Yoon, Voltage boosting circuit and method of generating boosting voltage, capable of alleviating effects of high voltage stress.
  26. Riedel,Friedbert; Speirs,Christopher Rodd, Voltage doubler circuit.
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