초록 ▼

The electrostatic discharge (ESD) protection device for a liquid crystal display using a chip on glass (COG) package is provided. The ESD protection device includes a plurality of gate lines and data lines each of which has an output pad at its end. A plurality of gate line input pads and data line

The electrostatic discharge (ESD) protection device for a liquid crystal display using a chip on glass (COG) package is provided. The ESD protection device includes a plurality of gate lines and data lines each of which has an output pad at its end. A plurality of gate line input pads and data line input pads are formed opposite to the output pads of the gate lines and data lines, respectively. A common electrode is formed between the plurality of gate line input pads and output pads and between the data line input pads and output pads. A plurality of electrostatic discharge protection circuits are connected between the input pads and the common electrodes to protect the input pads from electrostatic discharge.

대표청구항 ▼

[ What is claimed is:] [1.] An electrostatic discharge protection device for a liquid crystal display using a chip on glass package, the electrostatic discharge protection device comprising:a plurality of gate lines, each one of the plurality of gate lines having an output pad at one end;a plurality

[ What is claimed is:] [1.] An electrostatic discharge protection device for a liquid crystal display using a chip on glass package, the electrostatic discharge protection device comprising:a plurality of gate lines, each one of the plurality of gate lines having an output pad at one end;a plurality of data lines, each one of the plurality of data lines having an output pad at one end;a plurality of gate line input pads formed opposite to output pads of the gate lines;a plurality of data line input pads formed opposite to output pads of the data lines;a common electrode formed between the plurality of gate line input pads and the output pads of the gate lines and formed between the plurality of data line input pads and the output pads of the data lines; anda first plurality of electrostatic discharge protection circuits connected between the plurality of gate line input pads and the common electrode.