초록 ▼

In one embodiment, the present invention is provided for higher BJT gain and more quality device. Providing a substrate incorporating a device, wherein the device is defined MOS region and BJT region. Conductivity-type well region is formed on the substrate, and then a gate oxide layer is formed on

In one embodiment, the present invention is provided for higher BJT gain and more quality device. Providing a substrate incorporating a device, wherein the device is defined MOS region and BJT region. Conductivity-type well region is formed on the substrate, and then a gate oxide layer is formed on the conductivity-type well region of MOS region. Consequently, a polysilicon layer is deposited on the gate oxide layer of MOS region. Using photolithographic and etching process to define a gate, wherein the polysilicon layer is used as the gate of MOS region. Further implanting ions of a first conductive type into the substrate of MOS region. A first dielectric layer is forming on sidewall of the gate, wherein the first dielectric layer is used as a spacer of MOS region. Sequentially, a first photoresist layer is formed over substrate of BJT region to define an emitter of BJT. Then implanting second ions of the first conductive type into the substrate of MOS region to form source/drain regions by using said spacer as a mask. Simultaneously implanting second ions of the first conductive type into the substrate to form the emitter of BJT. Sequentially, a second photoresist layer is deposited over the device of the MOS region. Finally, implanting third ions of the first conductive type into the emitter of BJT inside the substrate.

대표청구항 ▼

[ What is claimed is:] [1.] A method for forming a semiconductor device, said method comprising:providing a semiconductor substrate incorporating a device, wherein said device is defined metal oxide semiconductor (MOS) region and bipolar junction transistor (BJT) region;forming a conductivity-type w

[ What is claimed is:] [1.] A method for forming a semiconductor device, said method comprising:providing a semiconductor substrate incorporating a device, wherein said device is defined metal oxide semiconductor (MOS) region and bipolar junction transistor (BJT) region;forming a conductivity-type well region on the semiconductor substrate;forming a gate oxide layer on said conductivity-type well region of MOS region;depositing a polysilicon layer on said gate oxide layer of MOS region;using photolithographic and etching process to define a gate structure, wherein the polysilicon layer is used as said gate of MOS region;implanting ions of a first conductive type into the semiconductor substrate of MOS region;forming a first dielectric layer on side wall of the gate, wherein said first dielectric layer is used as a spacer of MOS region;forming a first photoresist layer over semiconductor substrate of BJT region to define a emitter of BJT;implanting second ions of the first conductive type into the semiconductor substrate of MOS region to form source/drain regions by using said spacer as a mask;simultaneously implanting second ions of the first conductive type into the semiconductor substrate to form said emitter of BJT;depositing a second photoresist layer over the device of the MOS region; andimplanting third ions of the first conductive type into said emitter of BJT inside the semiconductor substrate.