초록 ▼

A process for forming a metal-insulator-metal (MIM) capacitor structure includes forming a recess in the dielectric layer (20) of a semiconductor substrate (10). A first capacitor electrode (30, 40) is formed in the recess having a copper first metal layer (30) with a conductive oxidation barrier (4

A process for forming a metal-insulator-metal (MIM) capacitor structure includes forming a recess in the dielectric layer (20) of a semiconductor substrate (10). A first capacitor electrode (30, 40) is formed in the recess having a copper first metal layer (30) with a conductive oxidation barrier (40) formed over the first metal layer (30). The first capacitor electrode (30, 40) is planarized relative to the dielectric layer (20). An insulator (50) is formed over the first capacitor electrode (30, 40) and a second capacitor electrode (65) is formed over the insulator (50). Forming the first capacitor electrode (30, 40) in the recess maintains the alignment of a periphery of the copper first metal layer (30) with the conductive oxidation barrier (40).

대표청구항 ▼

1. A process for forming a metal-insulator-metal (MIM) capacitor structure comprising:providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate; forming a recess in the dielectric layer; forming a first metal layer in the recess, the first metal layer comprisin

1. A process for forming a metal-insulator-metal (MIM) capacitor structure comprising:providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate; forming a recess in the dielectric layer; forming a first metal layer in the recess, the first metal layer comprising copper; recessing the first metal layer; forming a second metal layer over the first metal layer, the second metal layer being a conductive oxidation barrier for the first metal layer, wherein the first metal layer and the second metal layer are a bottom electrode of the mim capacitor structure; forming an insulator over the second metal layer; and forming a third metal layer over the insulator, wherein the third metal layer is a top electrode of the MIM capacitor structure.