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Purge heater design and process development for the improvement of low k film properties 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • C23C-016/40
출원번호 US-0820586 (2001-03-28)
발명자 / 주소
  • Rocha-Alvarez, Juan Carlos
  • Chen, Chen-An
  • Yieh, Ellie
  • Venkataraman, Shankar
출원인 / 주소
  • Applied Materials Inc.
대리인 / 주소
    Moser, Patterson & Sheridan
인용정보 피인용 횟수 : 5  인용 특허 : 157

초록 ▼

The present invention provides a method of depositing a carbon doped silicon oxide film having a low dielectric constant (k). A process gas mixture containing at least a carrier gas, an oxidizer, a carbon gas source, or combinations thereof, is supplied adjacent an edge of a substrate though a purge

대표청구항 ▼

The present invention provides a method of depositing a carbon doped silicon oxide film having a low dielectric constant (k). A process gas mixture containing at least a carrier gas, an oxidizer, a carbon gas source, or combinations thereof, is supplied adjacent an edge of a substrate though a purge

이 특허에 인용된 특허 (157)

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  117. Wang David N. (Cupertino CA) White John M. (Hayward CA) Law Kam S. (Union City CA) Leung Cissy (Union City CA) Umotoy Salvador P. (Pittsburg CA) Collins Kenneth S. (San Jose CA) Adamik John A. (San R, Plasma-enhanced CVD process using TEOS for depositing silicon oxide.
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  119. Malba Vincent, Process for 3D chip stacking.
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  127. Friedt Jean-Marie (Tokyo JPX) Claverie Pierre (Tsuchiura JPX) Perrin Jme (Paris FRX), Process for producing a deposit of an inorganic and amorphous protective coating on an organic polymer substrate.
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  150. Takagi Eizi (Ooita JPX), Vacuum holder.
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