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Method for sensing negative threshold voltages in non-volatile storage using current sensing 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G11C-016/04
  • G11C-016/06
출원번호 US-0771982 (2007-06-29)
등록번호 US-7447079 (2008-11-04)
발명자 / 주소
  • Nguyen,Hao Thai
  • Lee,Seungpil
  • Mui,Man Lung
  • Khalid,Shahzad
  • So,Hock
  • Govindu,Prashanti
  • Mokhlesi,Nima
  • Sekar,Deepak Chandra
출원인 / 주소
  • SanDisk Corporation
대리인 / 주소
    Vierra Magen Marcus & DeNiro LLP
인용정보 피인용 횟수 : 29  인용 특허 : 30

초록

Current sensing is performed in a non-volatile storage device for a selected non-volatile storage element with a negative threshold voltage. A control gate read voltage is applied to a selected word line of a non-volatile storage element, and source and p-well voltages are applied to a source and a

대표청구항

What is claimed is: 1. A method for operating a non-volatile storage system, comprising: applying a first voltage to a selected word line which is associated with at least a first non-volatile storage element, the at least a first non-volatile storage element being provided in a set of non-volatile

이 특허에 인용된 특허 (30)

  1. Gang Yung Jin,KRX, Bit line sense amplifier.
  2. Kim Myung-Ho (Suwon KRX), Bit line sensing control circuit for a semiconductor memory device.
  3. Marquot Alexis,FRX, Circuit and method of measuring the negative threshold voltage of a non-volatile memory cell.
  4. Chen,Jian, Compensating for coupling during read operations of non-volatile memory.
  5. Lee,Sang Bo, Current sense amplifier circuits having a bias voltage node for adjusting input resistance.
  6. Kurihara, Kazuhiro; Yachareni, Santosh K., Decoder apparatus and methods for pre-charging bit lines.
  7. Yang, Ching-Sung; Shen, Shih-Jye; Hsu, Ching-Hsiang, EEPROM with source line voltage stabilization mechanism.
  8. Endoh Tetsuo (Yokohama JPX) Shirota Riichiro (Kawasaki JPX) Ohuchi Kazunori (Yokohama JPX) Kirisawa Ryouhei (Yokohama JPX) Aritome Seiichi (Kawasaki JPX) Tanaka Tomoharu (Yokohama JPX) Tanaka Yoshiyu, Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference level.
  9. Prinz, Erwin J.; Swift, Craig T.; Yater, Jane A.; Lin, Sung-Wei; Baker, Jr., Frank K., Gate voltage reduction in a memory read.
  10. Cernea,Raul Adrian, Memory sensing circuit and method for low voltage operation.
  11. So,Kenneth; Fasoli,Luca; Kleveland,Bendik, Method and system for temperature compensation for memory cells with temperature-dependent behavior.
  12. Li,Yan; Pham,Long, Method for programming of multi-state non-volatile memory using smart verify.
  13. Tao, Hou; Tsai, Jih Ren, Method of forming a floating gate for a stacked gate flash memory device.
  14. Park,Jin Su; Kim,Doe Cook, Method of measuring threshold voltage for a NAND flash memory device.
  15. Tanaka Tomoharu (Yokohama JPX) Hemink Gertjan (Kawasaki JPX), Multi-state EEPROM having write-verify control circuit.
  16. Guterman Daniel C. ; Fong Yupin Kawing, Multi-state memory.
  17. Cernea,Raul Adrian; Li,Yan, Non-volatile memory and method with improved sensing.
  18. Cernea, Raul-Adrian, Non-volatile memory with temperature-compensated data read.
  19. Endoh Tetsuo,JPX ; Tanaka Yoshiyuki,JPX ; Aritome Seiichi,JPX ; Shirota Riichiro,JPX ; Shuto Susumu,JPX ; Tanaka Tomoharu,JPX ; Hemink Gertjan,JPX ; Tanzawa Toru,JPX, Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state.
  20. Ajika Natsuo,JPX ; Matsuo Akinori,JPX, Nonvolatile semiconductor memory device.
  21. Chen, Jian; Tanaka, Tomoharu; Fong, Yupin; Quader, Khandker N., Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states.
  22. Varner ; Jr. Thomas L. (Williamsburg VA) Blount Timothy W. (Poquoson VA) Minns Charles R. (Williamsburg VA), Removing stains from fixed items.
  23. Jian Chen, Selective operation of a multi-state non-volatile memory system in a binary mode.
  24. Takeuchi Ken,JPX ; Tanaka Tomoharu,JPX, Semiconductor device and memory system.
  25. Himeno Toshihiko,JPX ; Kanda Kazushige,JPX ; Nakamura Hiroshi,JPX, Semiconductor memory device.
  26. Tatsuya Matano JP, Sense amplifier circuit.
  27. Michael, Oron; Sever, Ilan, Sense amplifier circuit and method for nonvolatile memory devices.
  28. Chin-Hsi Lin TW, Source and drain sensing.
  29. Lutze, Jeffrey W.; Chen, Jian; Li, Yan; Higashitani, Masaaki, Source side self boosting technique for non-volatile memory.
  30. He, Yi; Liu, Zhizheng; Randolph, Mark W.; Haddad, Sameer S., System for programming a non-volatile memory cell.

이 특허를 인용한 특허 (29)

  1. Sekar, Deepak Chandra; Mokhlesi, Nima, Biasing non-volatile storage to compensate for temperature variations.
  2. Huynh, Jonathan; Park, Jongmin, Cell current control through power supply.
  3. Mui, Man Lung; Park, Jongmin; Nguyen, Hao Thai; Lee, Juan Carlos; Lee, Seungpil; Chu, Alexander Tsang-nam, Compact high speed sense amplifier for non-volatile memory.
  4. Mui, Man Lung; Kato, Yosuke; Nguyen, Hao Thai; Lee, Seungpil, Compact high speed sense amplifier for non-volatile memory and hybrid lockout.
  5. Mui, Man Lung; Park, Jongmin; Nguyen, Hao Thai; Lee, Seungpil, Compact high speed sense amplifier for non-volatile memory with reduced layout area and power consumption.
  6. She, Min; Li, Yan; Kim, Kwang-Ho; Chan, Siu Lung, Compact sense amplifier for non-volatile memory.
  7. She, Min; Li, Yan; Kim, Kwang-Ho; Chan, Siu Lung, Compact sense amplifier for non-volatile memory suitable for quick pass write.
  8. Dunga, Mohan V.; Higashitani, Masaaki, Data state-based temperature compensation during sensing in non-volatile memory.
  9. Nguyen, Hao Thai; Mui, Man Lung; Lee, Seungpil; Zhang, Fanglin; Wang, Chi-Ming, High speed sense amplifier array and method for non-volatile memory.
  10. Nguyen, Hao Thai; Mui, Man Lung; Lee, Seungpil, Low noise sense amplifier array and method for nonvolatile memory.
  11. Nguyen, Hao Thai; Mui, Man Lung; Lee, Seungpil, Low noise sense amplifier array and method for nonvolatile memory.
  12. Nguyen, Hao Thai; Mui, Man Lung; Lee, Seungpil, Low noise sense amplifier array and method for nonvolatile memory.
  13. Moschiano, Violante; Di Cicco, Domenico; D'Alessandro, Andrea, Memory cell sensing using a boost voltage.
  14. Moschiano, Violante; Di Cicco, Domenico; D'Alessandro, Andrea, Memory cell sensing using a boost voltage.
  15. Meir, Avraham; Sommer, Naftali; Gurgi, Eyal, Memory device with reduced sense time readout.
  16. Nguyen, Hao Thai; Lee, Seungpil; Mui, Man Lung; Khalid, Shahzad; So, Hock; Govindu, Prashanti; Mokhlesi, Nima; Sekar, Deepak Chandra, Non-volatile storage with current sensing of negative threshold voltages.
  17. Yoo, Pil Seon; Lee, Ji-Sang; Choo, Gyosoo, Nonvolatile memory device and method of operating the same.
  18. Choi, JinHyeok; Oh, Hwaseok, Nonvolatile memory devices and error correction methods thereof.
  19. Louie, Kenneth; Nguyen, Khanh; Nguyen, Hao, Operational amplifier methods for charging of sense amplifier internal nodes.
  20. Li, Yan; Khandelwal, Anubhav, Programming memory with bit line floating to reduce channel-to-floating gate coupling.
  21. Li, Yan, Programming memory with direct bit line driving to reduce channel-to-floating gate coupling.
  22. Li, Yan, Programming memory with sensing-based bit line compensation to reduce channel-to-floating gate coupling.
  23. Li, Yan, Programming memory with sensing-based bit line compensation to reduce channel-to-floating gate coupling.
  24. Sekar, Deepak Chandra; Mokhlesi, Nima, Reducing energy consumption when applying body bias to substrate having sets of NAND strings.
  25. Sekar, Deepak Chandra; Mokhlesi, Nima, Reducing energy consumption when applying body bias to substrate having sets of nand strings.
  26. Lee, Jong Hoon, Semiconductor memory device.
  27. Nguyen, Hao Thai; Mui, Man Lung; Lee, Seungpil; Wang, Chi Ming, Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise.
  28. Roohparvar, Frankie F.; Sarin, Vishal, Sensing of memory cells in NAND flash.
  29. Zhang, Fanglin; Park, Jong; Mui, Man; Chu, Alexander; Lee, Seungpil, Voltage generator to compensate sense amplifier trip point over temperature in non-volatile memory.
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