초록 ▼

A super junction semiconductor device includes a semiconductor portion with a first surface and a second surface parallel to the first surface. The semiconductor portion includes a doped layer of a first conductivity type formed at least in a cell area. The super junction semiconductor device furthe

A super junction semiconductor device includes a semiconductor portion with a first surface and a second surface parallel to the first surface. The semiconductor portion includes a doped layer of a first conductivity type formed at least in a cell area. The super junction semiconductor device further includes columnar first super junction regions of a second, opposite conductivity type extending in a direction perpendicular to the first surface and separated by columnar second super junction regions of the first conductivity type. The first and second super junction regions form a super junction structure between the first surface and the doped layer. A distance between the first super junction regions and the second surface does not exceed 30 μm.

대표청구항 ▼

1. A super junction semiconductor device, comprising: a semiconductor portion with a first surface and a second surface parallel to the first surface, and comprising a doped layer of a first conductivity type formed at least in a cell area; andcolumnar first super junction regions of a second, oppos

1. A super junction semiconductor device, comprising: a semiconductor portion with a first surface and a second surface parallel to the first surface, and comprising a doped layer of a first conductivity type formed at least in a cell area; andcolumnar first super junction regions of a second, opposite conductivity type extending in a direction perpendicular to the first surface and separated by columnar second super junction regions of the first conductivity type, the first and second super junction regions forming a super junction structure between the first surface and the doped layer, wherein a distance between the first super junction regions and the second surface does not exceed 30 μm. 2. The super junction semiconductor device of claim 1, wherein a thickness of the semiconductor portion between the first and second surfaces is at most 100 μm. 3. The super junction semiconductor device of claim 1, further comprising a first electrode structure directly adjoining the first surface and a second electrode structure directly adjoining the second surface, the first electrode structure having a first thickness and the second electrode structure having a second thickness, wherein the sum of the first and second thicknesses is at least 20% of the thickness of the semiconductor portion between the first and second surfaces. 4. The super junction semiconductor device of claim 1, further comprising counter-doped islands of the second conductivity type, the counter-doped islands directly adjoining the second surface and being separated by portions of the doped layer. 5. The super junction semiconductor device of claim 4, wherein the counter-doped islands are aligned to the first super junction regions and are absent in an edge area surrounding the cell area. 6. The super junction semiconductor device of claim 1, further comprising: auxiliary structures formed within a section between the first surface and a buried edge of the super junction structure oriented to the second surface, the auxiliary structures provided from a foreign material different from a first single-crystalline semiconductor material forming the semiconductor portion; anda stress relief portion with atoms of a second semiconductor material replacing atoms of the first semiconductor material in a crystal lattice of the single-crystal forming the semiconductor portion. 7. The super junction semiconductor device of claim 6, wherein the stress relief portion overlaps portions of the first and/or second super junction regions. 8. The super junction semiconductor device of claim 1, further comprising a porous layer between the super junction structure and the doped layer. 9. The super junction semiconductor device of claim 8, wherein the porous layer is formed directly adjacent to the doped layer. 10. The super junction semiconductor device of claim 1, wherein the doped layer directly adjoins the second surface and is formed by solid phase epitaxy. 11. The super junction semiconductor device of claim 1, further comprising a field stop structure that is of the first conductivity type, directly adjoins the doped layer and has a mean impurity concentration that is at most 10% of the maximum impurity concentration in the doped layer. 12. The super junction semiconductor device of claim 1, wherein the field stop structure includes counter-doped sections in a vertical projection of the first super junction regions. 13. The super junction semiconductor device of claim 1, wherein the super junction semiconductor device is an insulated gate field effect transistor and the doped layer corresponds to a drain layer and directly adjoins the second surface. 14. A super junction semiconductor device, comprising: a semiconductor portion with a first surface and a second surface parallel to the first surface, and comprising a doped layer of a first conductivity type formed at least in a cell area;columnar first super junction regions of a second, opposite conductivity type extending in a direction perpendicular to the first surface and separated by columnar second super junction regions of the first conductivity type, the first and second super junction regions forming a super junction structure between the first surface and the doped layer, wherein a distance between the first super junction regions and the second surface does not exceed 30 μm; andcounter-doped islands of the second conductivity type, the counter-doped islands directly adjoining the second surface and being separated by portions of the doped layer.