Ion beam etching utilizing cryogenic wafer temperatures
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H01L-021/311
H01L-021/3065
H01L-021/67
H01L-027/22
H01L-043/08
출원번호
US-0054023
(2016-02-25)
등록번호
US-9779955
(2017-10-03)
발명자
/ 주소
Lill, Thorsten
Berry, III, Ivan L.
Ricci, Anthony
출원인 / 주소
Lam Research Corporation
대리인 / 주소
Weaver Austin Villeneuve & Sampson LLP
인용정보
피인용 횟수 :
2인용 특허 :
15
초록▼
The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperatu
The embodiments herein relate to methods and apparatus for etching features in semiconductor substrates. In a number of cases, the features may be etched while forming a spin-torque-transfer random access memory (STT-RAM) device. In various embodiments, the substrate may be cooled to a low temperature via a cooled substrate support during particular processing steps. The cooled substrate support may have beneficial impacts in terms of reducing the degree of diffusion-related damage in a resulting device. Further, the use of a non-cooled substrate support during certain other processing steps can likewise have beneficial impacts in terms of reducing diffusion-related damage, depending on the particular step. In some implementations, the cooled substrate support may be used in a process to preferentially deposit a material (in some cases a reactant) on certain portions of the substrate. The disclosed embodiments may be used to achieve high quality anisotropic etching results.
대표청구항▼
1. A method of etching a substrate for forming a spin-torque-transfer random access memory (STT-RAM) device, the method comprising: receiving the substrate in a reaction chamber, the substrate comprising (i) a bottom electrode layer, (ii) an etch stop layer positioned over the bottom electrode layer
1. A method of etching a substrate for forming a spin-torque-transfer random access memory (STT-RAM) device, the method comprising: receiving the substrate in a reaction chamber, the substrate comprising (i) a bottom electrode layer, (ii) an etch stop layer positioned over the bottom electrode layer, (iii) a first magnetic layer positioned over the etch stop layer, (iv) a tunneling dielectric layer positioned over the first magnetic layer, (v) a second magnetic layer positioned over the tunneling dielectric layer, and (vi) a patterned mask layer;performing a first ion beam etching operation to define features on the substrate, the first ion beam etching operation comprising exposing the substrate to ion beams to etch through at least the second magnetic layer, the tunneling dielectric layer, and the first magnetic layer, andwherein during the first ion beam etching operation, a substrate support is maintained at a temperature between about 10° C. and about 120° C.;performing a second ion beam etching operation to narrow the features on the substrate, the second ion beam etching operation comprising exposing sidewalls of the features to ion beams,wherein the second ion beam etching operation is performed at a lower ion energy than the first ion beam etching operation, andwherein the first and/or second ion beam etching operation result in formation of conductive material on exposed portions of the tunneling dielectric layer and/or in the tunneling dielectric layer; andperforming a conductive material mitigation operation to mitigate the conductive material formed on or in the tunneling dielectric layer during the first and/or second ion beam etching operation, wherein mitigating the conductive material comprises either removing the conductive material or rendering the conductive material less conductive,wherein the conductive material mitigation operation comprises exposing the substrate to ion beams,wherein the conductive material mitigation operation is performed at a lower ion energy than the second ion beam etching operation, andwherein during the conductive material mitigation operation, the substrate support is maintained at a temperature between about −70° C. and about −10° C. 2. The method of claim 1, wherein during the second ion beam etching operation, the substrate support temperature is lowered by at least about 20° C. 3. The method of claim 1, wherein during the second ion beam etching operation, the substrate support is maintained at a temperature between about 10° C. and about 120° C. 4. The method of claim 1, wherein during the conductive material mitigation operation, the ion beams comprise oxygen ions and inert ions. 5. The method of claim 1, wherein during the conductive material mitigation operation, the ion beams comprise inert ions without reactive ions. 6. The method of claim 1, wherein during the conductive material mitigation operation, the ion beams comprise inert ions and one or more reactant selected from the group consisting of: O2, CO, CO2, N2, and combinations thereof. 7. The method of claim 1, wherein the ion energy during the first ion beam etching operation is between about 100-10,000 eV, wherein the ion energy during the second ion beam etching operation is between about 50-300 eV, and wherein the ion energy during the conductive material mitigation operation is between about 10-100 eV. 8. The method of claim 1, further comprising after the first ion beam etching operation and before the second ion beam etching operation, altering a relative orientation between the substrate and a direction in which the ion beams travel. 9. A method of etching a substrate for forming a spin-torque-transfer random access memory (STT-RAM) device, the method comprising: receiving the substrate in a reaction chamber, the substrate comprising (i) a bottom electrode layer, (ii) an etch stop layer positioned over the bottom electrode layer, (iii) a first magnetic layer positioned over the etch stop layer, (iv) a tunneling dielectric layer positioned over the first magnetic layer, (v) a second magnetic layer positioned over the tunneling dielectric layer, and (vi) a patterned mask layer;performing a first ion beam etching operation to define features on the substrate, the first ion beam etching operation comprising exposing the substrate to ion beams to etch through at least the second magnetic layer, the tunneling dielectric layer, and the first magnetic layer, andwherein during the first ion beam etching operation, a substrate support is maintained at a temperature between about 10° C. and about 120° C.;performing a second ion beam etching operation to narrow the features on the substrate, the second ion beam etching operation comprising exposing sidewalls of the features to ion beams and preferentially depositing a first material in regions etched during the first ion beam etching operation, andwherein during the second ion beam etching operation, the substrate support is maintained at a temperature between about −70° C. and about 10° C. 10. The method of claim 9, wherein (a) the first material is non-conductive, and/or (b) the first material, when combined with (i) a material of the bottom electrode layer, and/or (ii) a material of the first or second magnetic layer, is non-conductive. 11. The method of claim 10, wherein the first material comprises one or more materials selected from the group consisting of: carbon, SiO2, SiN, SiC, SiCO, SiCN, and combinations thereof. 12. The method of claim 10, further comprising during the second ion beam etching operation, sputtering the first material onto the sidewalls of the features. 13. The method of claim 9, wherein the first material is an etching reactant. 14. The method of claim 13, wherein during the second ion beam etching operation, the sidewalls of the features are exposed to the ion beams while the first material is deposited in the regions etched during the first ion beam etching operation. 15. The method of claim 13, wherein the second ion beam etching operation comprises cyclically (a) depositing the first material and (b) exposing the substrate to the ion beams, wherein (a) and (b) do not overlap in time. 16. The method of claim 13, wherein the etching reactant comprises a halide-containing compound and/or metalorganic compound. 17. The method of claim 9, further comprising after the first ion beam etching operation, altering a relative orientation between the substrate and a direction in which the ion beams travel. 18. The method of claim 17, wherein altering the relative orientation between the substrate and the direction in which the ion beams travel comprises tilting the substrate.
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