Common mode voltage ramping in Class-D amplifiers minimizing AM band emissions in passive keyless entry systems
원문보기
IPC분류정보
국가/구분
United States(US) Patent
등록
국제특허분류(IPC7판)
H03F-003/217
H03F-001/56
H03F-003/195
G07C-009/00
H03F-001/02
출원번호
US-0988582
(2018-05-24)
등록번호
US-10211796
(2019-02-19)
발명자
/ 주소
Effing, Hermanus J.
출원인 / 주소
NXP B.V.
인용정보
피인용 횟수 :
0인용 특허 :
5
초록▼
A switching amplifier circuit (50) connected to drive an impedance-based antenna drive circuit (55) includes high side and low side switches (51-54) configured and connected to connect different reference voltages to first and second output nodes (ANTP, ANTN) in response to gating control signals du
A switching amplifier circuit (50) connected to drive an impedance-based antenna drive circuit (55) includes high side and low side switches (51-54) configured and connected to connect different reference voltages to first and second output nodes (ANTP, ANTN) in response to gating control signals during an active phase and a disabled phase, and also includes an output drive circuit (59) that provides a ramped output voltage drive signal to the first output node while the second output node is connected over the second low side electronic switch to the second reference voltage during a transition phase of operation between the disabled phase and active phase, where the ramped output voltage drive signal is characterized by a predetermined slew-rate between the second reference voltage and the first reference voltage over a specified time interval.
대표청구항▼
1. A switching amplifier circuit comprising: first and second high side electronic switches configured and arranged to connect a first reference voltage to, respectively, first and second output nodes in response to first and second gating control signals during an active phase of operation when the
1. A switching amplifier circuit comprising: first and second high side electronic switches configured and arranged to connect a first reference voltage to, respectively, first and second output nodes in response to first and second gating control signals during an active phase of operation when the first and second gating control signals are opposing-phase signals, and to disconnect the first reference voltage from the first and second output nodes in response to the first and second gating control signals during a disabled phase of operation;first and second low side electronic switches configured and arranged to connect a second reference voltage to, respectively, the first and second output nodes in response to the first and second gating control signals during the active phase of operation, and to pull the both the first and second output nodes to the second reference voltage during the disabled phase of operation; andan output drive circuit configured and arranged to provide a ramped output voltage drive signal to the first output node while the second output node is connected over the second low side electronic switch to the second reference voltage during a transition phase of operation between the disabled phase and active phase,where the ramped output voltage drive signal is characterized by a predetermined slew-rate between the second reference voltage and the first reference voltage over a specified time interval. 2. The switching amplifier circuit of claim 1, wherein the first and second high side electronic switches and first and second low side electronic switches are pan of a Class D amplifier connected to drive an impedance-based antenna drive circuit to convey signals wirelessly from the switching amplifier circuit for receipt by another circuit. 3. The switching amplifier circuit of claim 1, further comprising an impedance-based load comprising an inductor coupled between the first and second output nodes, where the impedance-based load is configured and arranged to convey modulated signals wirelessly from the switching amplifier circuit for receipt and demodulation by another circuit. 4. The switching amplifier circuit of claim 3, where the impedance-based load is configured and arranged to convey modulated signals wirelessly, at carrier frequency of at least ten kilohertz, from the switching amplifier circuit for receipt and demodulation by a key-fob circuit. 5. The switching amplifier circuit of claim 1, where the transition phase of operation is a ramp-up transition phase during which the output drive circuit is configured and arranged to provide a ramped output voltage drive signal which rises from the second reference voltage to the first reference voltage. 6. The switching amplifier circuit of claim 1, where the transition phase of operation is a ramp-down transition phase during which the output drive circuit is configured and arranged to provide a ramped output voltage drive signal which falls from the first reference voltage to the second reference voltage. 7. The switching amplifier circuit of claim 1, where the predetermined slew-rate is controlled to reduce or eliminate AM band emissions from the switching amplifier circuit. 8. A circuit comprising: a switching amplifier comprising a high side switching transistor and low side switching transistor connected in series between first and second supply voltage lines;an output connection between the high side and slow side switching transistors for driving an output load;a switch driver circuit configured to drive the high side and slow side switching transistors with first and second respective control signals during an active phase common mode of operation to alternately connect the first supply voltage line and the second supply voltage line to the output connection, and to disconnect the first and second voltage lines from the output connection during a disabled phase of operation; andan output drive circuit configured and arranged to provide a ramped output voltage drive signal to the output connection while the output load is connected to the second supply line voltage during a transition phase of operation between the disabled phase and active phase,where the ramped output voltage drive signal is characterized by a predetermined slew-rate between the second supply voltage line and the first supply voltage line over a specified time interval. 9. The circuit of claim 8, where the switching amplifier comprises: first and second high side electronic switches configured and arranged to connect the first supply voltage line to, respectively, first and second output connection nodes of the output driving circuit in response to first and second gating control signals during an active phase of operation when the first and second gating control signals are opposing-phase signals, and to disconnect the first supply voltage line from the first and second output connection nodes in response to the first and second gating control signals during the disabled phase of operation; andfirst and second low side electronic switches configured and arranged to connect the second supply voltage line to, respectively, the first and second output connection nodes in response to the first and second gating control signals during the active phase of operation, and to pull the both the first and second output connection nodes to the second supply voltage line during the disabled phase of operation. 10. The circuit of claim 9, wherein the first and second high side electronic switches and first and second low side electronic switches are part of a Class D amplifier connected to drive an impedance-based antenna drive circuit to convey signals wirelessly from the circuit for receipt by another circuit. 11. The circuit of claim 8, wherein the output load comprises an impedance-based load comprising an inductor coupled between the first and second output connection nodes. 12. The circuit of claim 11, where the impedance-based load is configured and arranged to convey modulated signals wirelessly, at carrier frequency of at least ten kilohertz, from the circuit for receipt and demodulation by a key-fob circuit. 13. The circuit of claim 8, where the transition phase of operation is a ramp-up transition phase during which the output drive circuit is configured and arranged to provide a ramped output voltage drive signal which rises from the second supply voltage line to the first supply voltage line. 14. The circuit of claim 8, where the transition phase of operation is a ramp-down transition phase during which the output drive circuit is configured and arranged to provide a ramped output voltage drive signal which falls from the first supply voltage line to the second supply voltage line. 15. The circuit of claim 8 where the predetermined slew-rate is controlled to reduce or eliminate AM band emissions from the circuit. 16. The circuit of claim 8 where predetermined slew-rate is a fixed, linear slew-rate of approximately 0.5V/us. 17. A wireless communication system comprising: a key-fob circuit configured and arranged to receive and respond to modulated signals wirelessly; anda Class-D switching amplifier circuit connected to drive an impedance-based load connected between first and second output nodes without AM band emissions, comprising:first and second high side electronic switches configured and arranged to connect a first reference voltage to, respectively, the first and second output nodes in response to first and second gating control signals during an active phase of operation when the first and second gating control signals are opposing-phase signals, and to disconnect the first reference voltage from the first and second output nodes in response to the first and second gating control signals during a disabled phase of operation; andfirst and second low side electronic switches configured and arranged to connect a second reference voltage to, respectively, the first and second output nodes in response to the first and second gating control signals during the active phase of operation, and to pull the both the first and second output nodes to the second reference voltage during the disabled phase of operation; andan output node drive circuit configured and arranged to provide a ramped output voltage drive signal to one of the first and second output nodes while the other of the first and second output nodes is connected to the second reference voltage during a transition phase of operation between the disabled phase and active phase,where the ramped output voltage drive signal is characterized by a predetermined slew-rate between the second reference voltage and the first reference voltage over a specified time interval. 18. The wireless communication system of claim 17 where the predetermined slew-rate is a fixed, linear slew-rate of approximately 0.5V/us. 19. The wireless communication system of claim 17 where the predetermined slew-rate is a non-linear slew-rate. 20. The wireless communication system of claim 17, where the impedance-based load comprises an inductor coupled between the first and second output nodes, where the impedance-based load is configured and arranged to convey modulated signals wirelessly from the Class-D switching amplifier circuit for receipt and demodulation by the key-fob circuit. 21. The wireless communication system of claim 19, where the impedance-based load is configured and arranged to convey modulated signals wirelessly, at carrier frequency of at least ten kilohertz for receipt and demodulation by the key-fob circuit.
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