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NTIS 바로가기電子工學會論文誌. Journal of the Institute of Electronics Engineers of Korea. SD, 반도체, v.42 no.2 = no.332, 2005년, pp.49 - 56
이정민 (숭실대학교 컴퓨터학과) , 심은성 (숭실대학교 컴퓨터학과) , 장훈 (숭실대학교 컴퓨터학과)
In this paper, we propose a memory BIST Circuit Creation System which creates BIST circuit based on user defined fault model and generates the optimized march test algorithm. Traditional tools have some limit that regenerates BIST circuit after changing the memory type or test algorithm. However, th...
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Test Technology Standards Committee, 'IEEE Standard Test Access Port and Boundary-Scan Architecture,' IEEE Computer Society Press, 1993
Braden, J., Lin, Q. and Smith, B., 'Use of BIST in Sun FireTM servers,' International Test Conference,. pp. 1017-1022, 2001
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