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NTIS 바로가기마이크로전자 및 패키징 학회지 = Journal of the Microelectronics and Packaging Society, v.17 no.4, 2010년, pp.1 - 9
이강욱 (동북대학(일본))
Three-dimensional (3-D) integration is an emerging technology, which vertically stacks and interconnects multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked chip to form highly integrated micro-nano systems. Si...
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핵심어 | 질문 | 논문에서 추출한 답변 |
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소자의 미세화로 인해 발생하는 문제를 해결하기 위해 어떤 기술이 필요한가? | 그러나 반도체 소자의 미세화가 22 nm node, 11 nm node 이하로 진행됨에 따른 누설전류(Leakage Current)의 증가, 특성 불균형의 증가, 소비전력의 증대 및 노광장치등의 고가화에 따른 제조 코스트의 증가 등, 소자 미세화에 따른 다양한 문제들이 대두되어지고 있다. 이와같은 문제들을 해결하기 위해서는 소자의 미세화 이외에, LSI에 실장기술, MEMS (Mechanical-electrical micro system) 기술 및 포토닉스기술 등의 이종기술을 융합시킨 새로운 직접화기술이 필요로 하다. 최근 주목을 받고 있는 대표적인 직접화기술 중 하나가 삼차원집적화(Threedimensional Integration) 기술이다. | |
11nm node 이하로 반도체 소자가 미세화 됨에 따라 어떤 문제가 발생하고 있는가? | Moore의 법칙으로 알려져 있듯이, 지금까지 LSI는 미세 가공기술의 진보에 따른 반도체소자의 미세화를 통해 2-3년에 4배라는 놀라운 속도로 고성능화, 대용량화가 달성 되어져 왔다. 그러나 반도체 소자의 미세화가 22 nm node, 11 nm node 이하로 진행됨에 따른 누설전류(Leakage Current)의 증가, 특성 불균형의 증가, 소비전력의 증대 및 노광장치등의 고가화에 따른 제조 코스트의 증가 등, 소자 미세화에 따른 다양한 문제들이 대두되어지고 있다. 이와같은 문제들을 해결하기 위해서는 소자의 미세화 이외에, LSI에 실장기술, MEMS (Mechanical-electrical micro system) 기술 및 포토닉스기술 등의 이종기술을 융합시킨 새로운 직접화기술이 필요로 하다. | |
최근 반도체 소자의 직접화를 위하여 삼차원집적화 기술이 급격하게 발생된 이유는 무엇때문인가? | 최근 주목을 받고 있는 대표적인 직접화기술 중 하나가 삼차원집적화(Threedimensional Integration) 기술이다. 최근 수년 사이에 삼차 원집적화 기술이 급속하게 발전한 배경에는, 길이가 수십 µm로 매우 짧은 실리콘 관통전극(TSV: Through-Silicon Via)를 통해 여러층으로 적층화 된 칩들이 전기적으로 접속된 삼차원집적회로(3-D IC)가 병렬처리에 적합하고, 시스템의 소형화, 고속화 및 저소비전력화를 동시에 실현시 킬 수 있다는 가능성들이 보고되었기 때문이다.1-10) |
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