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[국내논문] Electromigration and Thermomigration in Flip-Chip Joints in a High Wiring Density Semiconductor Package 원문보기

마이크로전자 및 패키징 학회지 = Journal of the Microelectronics and Packaging Society, v.18 no.3, 2011년, pp.67 - 74  

Yamanaka, Kimihiro (School of Information Science and Technology, Chukyo University)

Abstract AI-Helper 아이콘AI-Helper

Keys to high wiring density semiconductor packages include flip-chip bonding and build-up substrate technologies. The current issues are the establishment of a fine pitch flip-chip bonding technology and a low coefficient of thermal expansion (CTE) substrate technology. In particular, electromigrati...

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제안 방법

  • In this paper, electromigration and thermomigration in Cu/Sn-3Ag-0.5Cu (SAC305)/Cu flip-chip joints and electromigration in Cu/In/Cu flip chip joints are investigated. In the electromigration test, a large electromigration void nucleation at the cathode, large growth of intermetallic compounds (IMCs) at the anode, a unique solder bump deformation towards the cathode, and the significantly prolonged electromigration lifetime with the underfill were observed in both types of joints.

대상 데이터

  • The chip was then bonded onto the substrate to form the joints in the second reflow. The solder materials were SAC and In, and the underfill was a commercially available epoxy resin. The solder bump height was approximately 70 and 100 µm for the In and SAC solders.
  • 2. The solder material was SAC305. Fig.
  • All Cu patterns were modeled. The simulation tool was ANSYS v11.0 and the model was a SOLID69 eight-node hexahedral coupled field element. The accuracy of the model has been verified and the difference in the temperature measurements was less than 1℃.
  • A "q" in the figure indicates the direction of thermal flow. The solder material in this figure was SAC305 and the current density was 10 kA/cm2, which corresponds to a direct current of 0.79 A, and the temperature at the joint was 180℃. The temperature on the chip side was higher than that on the substrate side by 0.

이론/모형

  • In this paper, the value calculated from the direct current per solder/Cu contact area is referred to as the current density in the flip-chip joint. The joint resistance was measured in-situ during the test using the four-point probing method. The substrate side was attached to the hot plate.
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참고문헌 (20)

  1. International Technology Roadmap for Semiconductors 2007 Edition. available : http://www.itrs.net/reports.html. 

  2. Y. Tsukada, S. Tsuchida, and Y. Mashimoto, "Surface laminar circuit packaging," in Proc. 42nd Electronic Components and Technology Conf, San Diego, CA, USA, 22 (1992). 

  3. E. D. Blackshear, M. Case, E. Klink, et al, "The evolution of build-up package technology and its design challenges," IBM J. Res. & Dev., 49(4/5), 641 (2005). 

  4. J. U. Knickerbocker, P. S. Andry, L. P. Buchwalter, et al, "Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection," IBM J. Res. & Dev., 49(4/5), 725 (2005). 

  5. Y. Tsukada, K. Yamanaka, and T. Nejime, "Current barriers and future direction of semiconductor packaging with flip chip bonding," J. IEICE (Japanese), J91-C(11), 509 (2008). 

  6. K. Yamanaka, K. Kobayashi, K. Hayashi, et al., "Materials, processes and performance of high wiring density build-up substrate with ultra low coefficient of thermal expansion," IEEE trans. Comp. Packag. Techonol., 33(2), 453 (2010). 

  7. K. Hayashi, K. Yamanaka, K. Kobayashi, et al., Advanced Surface Laminar Circuit Using New Composite Materials, in Proc. 51th IEEE Electronic Components and Technology Conf., Las Vegas, CA, USA, 543 (2010). 

  8. H. Ye, C. Basaran, and D. Hopkins, Thermomigration in Pb- Sn solder joints under joule heating during electric current stressing, J. Appl. Phys. Lett., 82(7), 1045 (2003). 

  9. K.N. Tu, Recent Advances on Electromigration in Very- Large-Scale-Integration of Interconnects, J. Appl. Phys. 94, 5451 (2003). 

  10. A.T. Huang, A. M. Gusak, and K. N. Tu, Thermomigration in SnPb composite flip chip solder joints, Appl. Phys. Lett. 88, 141911 (2006). 

  11. H.Y. Chen, C. Chen, and K. N. Tu, Failure induced by thermomigration of interstitial Cu in Pb-free flip chip solder joints, Appl. Phys. Lett. 93, 122103 (2008). 

  12. K. Yamanaka, T. Ooyoshi and T. Nejime, Temperature measurement at flip chip solder joint during electromigration test, J. Mater. Sci.: Mater. Electron. 21(1), 53 (2010). 

  13. M.A. Korhonen, P. Borgesen, K.N. Tu, et al., Stress evolution due to electromigration in confined metal lines, J. Appl. Phys. 73, 3790 (1993). 

  14. J. J. Clement, C. V. Thompson, Modeling electromigrationinduced sress evolution in confined metal lies, J. Appl. Phys. 78, 900 (1995). 

  15. K. Yamanaka, T. Ooyoshi, and T. Nejime, Effect of underfill on electromigration ligetime in flip chip joints, J. Alloy. Compd. 481, 659 (2009). 

  16. K. Lee, K. S. Kim, Y. Tsukada, et al., Effects of the crystallographic orientation of Sn on the electromigration of Cu/Sn- Ag-Cu/Cu ball joints, J. Mater. Res. 26(3), 467 (2010). 

  17. B. F. Dyson, Diffusion of Gold and Silver in Tin Single Crystals, J. Appl. Phys. 37 2375 (1966). 

  18. B. F. Dyson, Interstitial Diffusion of Copper in Tin, J. Appl. Phys. 38, 3408 (1967). 

  19. M. Lu, D. Y. Shih, P. Lauro, et al., Effect of Sn grain orientation on electromigration degradation mechanism in high Snbased Pb free solders, Appl. Phys. Lett. 92, 211909 (2008). 

  20. M.F. Abdulhamid, C. Basaran, and Y. S. Lai, Thermomigration versus electromigration in microelectronics solder joints, IEEE Trans. Adv. Pkg. 32(3), 627 (2009). 

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