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A Wide Output Range, High Power Efficiency Reconfigurable Charge Pump in 0.18 mm BCD process 원문보기

Journal of semiconductor technology and science, v.14 no.6, 2014년, pp.777 - 788  

Park, Hyung-Gu (College of Information and Communication Engineering, Sungkyunkwan University) ,  Jang, Jeong-A (College of Information and Communication Engineering, Sungkyunkwan University) ,  Cho, Sung Hun (College of Information and Communication Engineering, Sungkyunkwan University) ,  Lee, Juri (College of Information and Communication Engineering, Sungkyunkwan University) ,  Kim, Sang-Yun (College of Information and Communication Engineering, Sungkyunkwan University) ,  Tiwari, Honey Durga (College of Information and Communication Engineering, Sungkyunkwan University) ,  Pu, Young Gun (College of Information and Communication Engineering, Sungkyunkwan University) ,  Hwang, Keum Cheol (College of Information and Communication Engineering, Sungkyunkwan University) ,  Yang, Youngoo (College of Information and Communication Engineering, Sungkyunkwan University) ,  Lee, Kang-Yoon (College of Information and Communication Engineering, Sungkyunkwan University) ,  Seo, Munkyo (College of Information and Communication Engineering, Sungkyunkwan University)

Abstract AI-Helper 아이콘AI-Helper

This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power eff...

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  • The charge pump core uses 4 stages to increase the output voltage range. The circuit consists of charge transfer switches (MN1-MN8 , MP1-MP8), pumping capacitors (CT1 , CT2 , CT3 , CT4 , CB1 ,CB2 , CB3 and CB4), output capacitors (CLV, CHV) and output nodes of each stage (CPLV0, VOUT_LV, CPHV0, and VOUT_HV). In the high voltage mode of the multi-mode charge pump, the operation is similar to the operations of the low voltage mode, except that the voltage levels of Φ3, Φ4, Φ3B and Φ4B are maintained to zero (Φ3 , Φ4) or VIN (Φ3B, Φ4B), equaling the supply voltage of the process, in the low voltage mode.
  • The proposed chip is fabricated in 0.18 mm BCD technology, a single poly layer, four layers of metal, options of metal-insulator-metal (MIM) capacitors, and high sheet resistance poly resistors. The chip layout pattern is shown in Fig.
  • 1 shows a block diagram of the proposed automatic reconfigurable charge pump. The proposed reconfigurable charge pump is composed of the a Charge Pump Core, Clock Driver, Output Voltage Sense Network, MUX, Low Pass Filter (LPF), Reference Voltage Generator, Control Signal Generator (CSG) and Switch (SW0) connected to the External IC. Its configuration is automatically changed to generate the dual outputs, VOUT_LV and VOUT_HV, from the second stage and fourth stage, respectively.
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참고문헌 (18)

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  12. H. Lin and N.-H. Chen, "New four-phase generation circuits for low voltage charge pumps," in Proc. IEEE Int. Symp. Circuits Syst., vol. 1, pp. 504-507, May 2001. 

  13. S.-Y. Lai and J.-S. Wang, "A high-efficiency CMOS charge pump circuit," in Proc. IEEE Int. Symp. Circuits Syst., vol. 4, pp. 406-409, May 2001. 

  14. H. Lin, K.-H. Chang and S.-C. Wong, "Novel high positive and negative pumping circuits for low supply voltage," in Proc. IEEE Int. Symp. Circuits Syst., vol. 1, pp. 238-241, Jul. 1999. 

  15. C. Lauterbach, W. Weber and D. Romer, "Charge sharing concept and new clocking scheme for power efficiency and electromagnetic emission improvement of boosted charge pumps," IEEE J. Solid-State Circuits, vol. 35, no. 5. pp. 719-723, May 2000. 

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