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NTIS 바로가기전기전자학회논문지 = Journal of IKEEE, v.25 no.2, 2021년, pp.302 - 308
조세현 (Department of Electronic Engineering, Graduate School, Kumoh National Institute of Technology) , 정호용 (Department of Electronic Engineering, Graduate School, Kumoh National Institute of Technology) , 도원규 (Department of Electronic Engineering, Graduate School, Kumoh National Institute of Technology) , 이한열 (Department of Electronic Engineering, Graduate School, Kumoh National Institute of Technology) , 장영찬 (Department of Electronic Engineering, Graduate School, Kumoh National Institute of Technology)
A 12-bit 10-MS/s pipeline analog-to-digital converter (ADC) is proposed for image processing applications. The proposed pipeline ADC consists of a sample and hold amplifier, three stages, a 3-bit flash analog-to-digital converter, and a digital error corrector. Each stage is operated by using a 4-bi...
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H.-C. Choi, Y.-J. Kim, M.-H. Lee, Y.-L. Kim, and S.-H. Lee, "A 12b 50MS/s 10.2mA 0.18um CMOS Nyquist ADC with a fully differential class-AB switched OP-AMP," IEEE Symp. VLSI Circuits, pp.220-221, 2008
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J.-K. Woo, H. Lee, H.-C. Kim, D.-K. jeong, and S. Kim, "1.2V 10-bit 75MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS," IEEE Trans. VLSI Systems, vol.22, no.3, pp.585-592, 2014.
Seon-mi Yeo, "A 10-bit 100MSample/s Pipeline ADC with 70dBc SFDR," Master's thesis, Kookmin University, 2008.
Se-Hyeon Cho, Ho-Yong Jung, Won-Kyu Do, Young-Chan Jang, "13-bit 10-MS/s CMOS Pipeline Analog-to-Digital Converter," Conference of Korean Institute of Information Technology, pp.166-168, 2020.
Y. Suh, S. Choi and J. Sim, "A Low-Power Class-AB Gm-Based Amplifier With Application to an 11-bit Pipelined ADC," IEEE Trans. VLSI Systems, vol.24, no.7, pp.2562-2569, 2016. DOI: 10.1109/TVLSI.2015.2504494
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