최소 단어 이상 선택하여야 합니다.
최대 10 단어까지만 선택 가능합니다.
다음과 같은 기능을 한번의 로그인으로 사용 할 수 있습니다.
NTIS 바로가기Journal of sensor science and technology = 센서학회지, v.26 no.3, 2017년, pp.155 - 159
Oh, Chang-Woo (Department of Sensor and Display Engineering, Kyungpook National University) , Choi, Byoung-Soo (School of Electronics Engineering, Kyungpook National University) , Kim, JinTae (School of Electronics Engineering, Kyungpook National University) , Seo, Sang-Ho (School of Electronics Engineering, Kyungpook National University) , Shin, Jang-Kyoo (School of Electronics Engineering, Kyungpook National University) , Choi, Pyung (School of Electronics Engineering, Kyungpook National University)
The analog-to-digital converter (ADC) is an important component in various fields of sensor signal processing. This paper presents an expandable flash analog-to-digital converter (E-flash ADC) for sensor signal processing using a comparator, a subtractor, and a multiplexer (MUX). The E-flash ADC was...
* AI 자동 식별 결과로 적합하지 않은 문장이 있을 수 있으니, 이용에 유의하시기 바랍니다.
A. A. Abualsaud, S Qaisar, S. H. Ba-Abdullah, Z.M. Al- Sheikh and M Akbar, " Design and implementation of a 5- bit flash ADC for education," 2016 5th International Conference on Electronic Devices, Systems and Application( ICEDSA), pp. 1-4, 2016.
T. Kalita, B, Das, "A 4 bit Quantum Voltage Comparator based flash ADC for low noise applications," 2016 Conference on Emerging Devices and Smart Systems (ICEDSS), pp. 24-29, 2016.
Y. K. Upadhyaya, M. K. Gupta, M. Hasan, and S. Maheshwari, "High-density magnetic flash ADC using domain-wall motion and pre-charge sense amplifiers," IEEE Transactions on Magnetics, Vol. 52 Issue 6, 2016.
P. P. Kute, P. Dakhole, and P. Palsodkar, "Cross coupled digital NAND gate comparator based flash ADC," 2015 International Conference on Communications and Signal Processing (ICCSP), pp. 1718-1721, 2015.
S. Biswas, J. K. Das, and R. Prasad, "Design and implementation of 4 bit flash ADC using low power low offset dynamic comparator," 2015 International Conference on Electrical, Electronics, Signals, Communication and Opti-mization (EESCO), pp. 1-6, 2015.
C.-H. Chen, Y. Zhang, Y. Jung, T. He, J. L. Ceballos, and G. C. Temes, "Two-step incremental analogue-to-digital converter," Electronics Letters, Vol. 49, Issue 4, 2013.
A. Inamdar, A. Sahu, J. Ren, S. Setoodeh, R. Mansour, and D. Gupta "Design and evaluation of flash ADC," IEEE Transactions on Applied Superconductivity, Vol. 25, Issue 3, 2015.
R. Megha, and K. A. Pradeepkumar "Implementation of low power flash ADC by reducing comparators," 2014 International Conference on Communication and Signal Processing, pp. 443-447, 2014.
S. Sheikhaei, S. Mirabbasi, A. Ivanov "A 0.35 ${\mu}m$ CMOS comparator circuit for high-speed ADC applications," 2005 IEEE International Symposium on Circuits and Systems, pp. 6134-6137, 2005.
A. Inamdar, A. Sahu, J. Ren, A. Dayalu, D. Gupta "Flash ADC comparators and techniques for their evaluation," IEEE Transactions on Applied Superconductivity, Volume: 23, Issue: 3, pp. 1400308-1400308, 2013.
S. H. Nasrollaholhosseini, S. B. Mashhadi, and R. Lotfi "Power reduction techniques in a 6 bit 1 GSPS flash ADC," 20th Iranian Conference on Electrical Engineering (ICEE2012), pp. 228-231, 2012.
M. T. Heo "A Study on A / D Converter with Clock-less Successive Approximation Method," Journal of Busan University of Technology, Vol. 30, pp. 569-576, 1998.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.