참고문헌 (21)

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7. Proc 6th Int Conf Solid-State Integrated-Circuit Technology characteristics of different structure sub-100-nm mosfets with high- $\kappa$ gate dielectrics liu 2001 10.1109/ICSICT.2001.981488 1 333 

   

8. Mohapatra, N.R., Desai, M.P., Narendra, S.G., Rao, V.R.. The effect of high-K gate dielectrics on deep submicrometer CMOS device and circuit performance. IEEE transactions on electron devices, vol.49, no.5, 826-831.

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21. User s Manual for SUPREM Two-Dimensional Process Simulation 2003